Faster IP Integration

By Ed Sperling - 03 Jul, 2013 - Comments: 0

By Ed Sperling System-Level Design sat down with Laurent Moll, chief technology officer at Arteris, to talk about interoperability, complexity and integration issues. What follows are excerpts of that conversation. SLD: What’s the big challenge with IP? Moll: Interoperability is always a concern. Because of ARM’s dominance, a lot of people are moving to AMBA protocols, whether that’... » read more

Life After Smartphones

By Frank Ferro - 27 Jun, 2013 - Comments: 0

By Frank Ferro Don’t let the title confuse you. Smartphones are not going away anytime soon. In fact this year’s smartphone shipments have exceeded feature phones for the first time, with a total of 216 million units in Q1, according to IDC, and the overall mobile phone market is expected to grow 4.3% in 2013. This volume represents an increase in smartphone sales of 42% from Q1 2012. ... » read more

The Week In Review: June 7

By Ed Sperling - 07 Jun, 2013 - Comments: 0

By Ed Sperling For all the hesitation about moving the Design Automation Conference to Austin, it turns out that Austin has a lot of hardware engineers. In fact they flooded into the conference, turning it into one of the most successful in recent years and setting new records in multiple areas. Even Texas Gov. Rick Perry showed up to see what all the fuss was about. Mentor Graphics added c... » read more

The X Factor

By Ed Sperling - 30 May, 2013 - Comments: 0

By Ed Sperling The number of unknowns is growing in every segment of SoC design all the way through manufacturing, raising the stakes between reliability and the tradeoffs necessary to meet market windows. Tools are available to deal with some of these unknowns, or X’s, but certainly not all of them. Moreover, no single tool can handle all unknowns, some of which can build upon other unkn... » read more

The Analyst View

By Kurt Shuler - 25 Apr, 2013 - Comments: 0

By Kurt Shuler I was fortunate to be able to meet with 13 different semiconductor industry analysts from eight different companies over the last two weeks. Our conversations ranged from the current state of the semiconductor industry to future software architecture trends. I want to take this opportunity to thank them once again for the exchange of ideas and the opportunity to learn from them.... » read more

The Rise Of Layout-Dependent Effects

By Ann Mutschler - 28 Feb, 2013 - Comments: 0

By Ann Steffora Mutschler Designing for today’s advanced semiconductor manufacturing process nodes brings area, speed, power and other benefits but also new performance challenges as a result of the pure physics of running current through tiny wires. Layout-dependent effects (LDE), which emerged at 40nm and are having a larger impact at 28 and 20nm, introduce variability to circuit ... » read more

Advanced SoC Interconnect IP

By Kurt Shuler - 28 Feb, 2013 - Comments: 0

By Kurt Shuler I am thoroughly enjoying 2013. That’s because there seems to be a lot more reason for optimism this year than last year. But before we let go of 2012, it’s important to reflect on the past year and see what it can teach us so we can make better business decisions moving forward. The one lesson learned is that flexibility for SoC designs is increasingly more important. In ... » read more

Chip Economics

By Various Writers - 28 Feb, 2013 - Comments: 0

The concise research paper, "NoC Interconnect Improves SoC Economics: Initial Investment is Low Compared to SoC Performance and Cost Benefits," by Objective Analysis Semiconductor Market Research, provides quantitative data from user experiences comparing the costs and benefits of implementing network on chip SoC interconnects versus traditional bus and crossbar interconnects. You will learn... » read more

An Analysis Of Blocking Vs. Non-Blocking Flow Control In On-Chip Networks

By Various Writers - 29 Dec, 2012 - Comments: 0

High end System-on-Chip (SoC) architectures consist of tens of processing engines. These processing engines have varied traffic profiles consisting of priority traffic that require that the latency of the traffic is minimized, controlled bandwidth traffic that require low service jitter on the throughput, and best effort traffic that can tolerate highly variable service. In this paper, we inves... » read more

On-Chip Communications Survey Results

By Various Writers - 19 Dec, 2012 - Comments: 0

This comprehensive report takes a closer look at general technology trends and factors associated with OCCNs, such as core target speeds. It investigates the most popular OCCN topologies being considered for implementation in multi-core SoCs, including networks-on-chip (NoCs), crossbars, peripheral interconnect, and multi-layer bus matrices. It then dives deeper into NoCs, including analyzing a... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

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