Chip Industry’s Earnings Roundup


Editor's Note: Updated throughout February 2023 for additional earnings releases. Many companies reported revenue growth in the most recent quarter, but the latest round of chip industry earnings releases reflected some major themes: Demand for consumer electronics softened due to inflation, rising interest rates, and post-pandemic market saturation, creating a slump in the memory chip ... » read more

Scatterometry-Based Methodologies For Characterization Of MRAM Technology


Magnetoresistive random-access memory (MRAM) technology and recent developments in fabrication processes have shown it to be compatible with Si-based complementary metal oxide semiconductor (CMOS) technologies. The perpendicular spin transfer torque MRAM (STT-MRAM) configuration opened up opportunities for an ultra-dense MRAM evolution and was most widely adapted for its scalability. Insertion ... » read more

Metrology Options Increase As Device Needs Shift


Semiconductor fabs are taking an ‘all hands on deck’ approach to solving tough metrology and yield management challenges, combining tools, processes, and other technologies as the chip industry transitions to nanosheet transistors on the front end and heterogenous integration on the back end. Optical and e-beam tools are being extended, while X-ray inspection is being added on a case-by-... » read more

Week In Review: Semiconductor Manufacturing, Test


SEMI , SEMI Europe and European Commission representatives, in consultation with semiconductor industry stakeholders, proposed initiatives to overcome the skills shortage in Europe’s microelectronics industry: Create an industry image campaign to raise public awareness on how technology is shaping the future, and how workers can establish careers in the semiconductor industry. Remove ... » read more

The March Toward Chiplets


The days of monolithic chips developed at the most advanced process nodes are rapidly dwindling. Nearly everyone working at the leading edge of design is looking toward some type of advanced packaging using discrete heterogeneous components. The challenge now is how to shift the whole chip industry into this disaggregated model. It's going to take time, effort, as well as a substantial reali... » read more

A New Dimension In Optical CD


One of the biggest challenges for nanoscale fabrication is how to measure devices on such a minute scale. As the semiconductor industry demands ever smaller devices, the need for reliable, robust measurements for quality control and process optimization increases. One robust and commonly used technique in semiconductor manufacturing is optical critical dimension (OCD) metrology. Standard, al... » read more

Nova METRION Use Cases


Several use cases that we will explore for the Nova METRION® system include contamination control, process excursion prevention, reactor matching, and uniformity control. The objectives of these use cases are to detect contaminants which can kill devices, improve barrier layer and source/drain function, maintain deposition uniformity that impacts downstream processes, and ensure wafer-to-wafer... » read more

Systematic Yield Issues Now Top Priority At Advanced Nodes


Systematic yield issues are supplanting random defects as the dominant concern in semiconductor manufacturing at the most advanced process nodes, requiring more time, effort, and cost to achieve sufficient yield. Yield is the ultimate hush hush topic in semiconductor manufacturing, but it's also the most critical because it determines how many chips can be profitably sold. "At older nodes, b... » read more

Metrology Of Thin Resist For High NA EUVL


One of the many constrains of high numerical aperture extreme ultraviolet lithography (High NA EUVL) is related to resist thickness. In fact, one of the consequences of moving from current 0.33NA to 0.55NA (high NA) is the depth of focus (DOF) reduction. In addition, as the resist feature lines shrink down to 8nm half pitch, it is essential to limit the aspect ratio to avoid pattern collapse. T... » read more

Legacy Tools, New Tricks: Optical 3D Inspection


Stacking chips is making it far more difficult to find existing and latent defects, and to check for things like die shift, leftover particles from other processes, co-planarity of bumps, and adhesion of different materials such as dielectrics. There are several main problems: Not everything is visible from a single angle, particularly when vertical structures are used; Various struc... » read more

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