tag: Onto Innovation

AI/ML Challenges In Test and Metrology
By Gregory Haley - 12 Mar, 2024 - Comments: 0

The integration of artificial intelligence and machine learning (AI/ML) into semiconductor test and metrology is redefining the landscape for chip fabrication, which will be essential at advanced nodes and in increasingly dense advanced packages. Fabs today are inundated by vast amounts of data collected across multiple manufacturing processes, and AI/ML solutions are viewed as essential for... » read more

Why Chiplets Are So Critical In Automotive
By John Koon - 20 Feb, 2024 - Comments: 1

Chiplets are gaining renewed attention in the automotive market, where increasing electrification and intense competition are forcing companies to accelerate their design and production schedules. Electrification has lit a fire under some of the biggest and best-known carmakers, which are struggling to remain competitive in the face of very short market windows and constantly changing requir... » read more

Blog Review: Feb. 14
By Liz Allan - 14 Feb, 2024 - Comments: 0

Siemens’ Dilan Heredia and Karen Chow explain why fast, accurate parasitic extraction (PEX) is essential to design success, especially for the 3 nm node and GAAFETs. Synopsys’ Srinivas Velivala debunks the myth that layout-versus-schematic (LVS) checking is a static step in the chip development process, and details its evolving role in modern SoCs. Cadence’s Mark Seymour digs into a... » read more

Using OCD To Measure Trench Structures In SiC Power Devices
By Nick Keller - 08 Feb, 2024 - Comments: 0

You don’t have to be a dedicated follower of the transportation industry to know it is in the early stages of a significant transition, away from the rumbling internal combustion engine to the quiet days of electric vehicles. The signs of this transition are right there on the streets in the form of electric-powered buses, bikes and cars. The road to our electric future is before us, but we w... » read more

Inspection, Metrology Issues In Advanced Packages
By Gregory Haley - 08 Feb, 2024 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to talk about how to inspect and measure smaller features across large areas in advanced packaging, with Frank Chen, director of applications and product management at Bruker Nano Surfaces & Metrology; John Hoffman, computer vision engineering manager at Nordson Test & Measurement; and Jiangtao Hu, senior technology director at O... » read more

Yield Tracking In RDL
By Ed Sperling - 07 Feb, 2024 - Comments: 0

Yield is a much bigger issue when it comes to panel-level packages, which may contain up to 24 RDL layers. Just finding the defects is a massive challenge, let alone understanding how they will impact the entire device. Many of these advanced packages are being used in data centers for generative AI, and killer defects caused by bridges and opens can cause serious problems. What happens, for in... » read more

Fan-Out Panel-Level Packaging Hurdles
By Anne Meixner - 24 Jan, 2024 - Comments: 0

Fan-out panel-level packaging (FOPLP) promises to significantly lower assembly costs over fan-out wafer-level packaging, providing the relevant processes for die placement, molding and redistribution layers (RDLs) formation can be scaled up with equivalent yield. There is still much work to be done before that happens. Until now, FOPLP has been adopted for devices that are manufactured in ve... » read more

Chip Industry Week In Review
By The SE Staff - 19 Jan, 2024 - Comments: 0

By Jesse Allen, Gregory Haley, and Liz Allan Synopsys will acquire Ansys for about $35 billion in cash and stock. The deal will boost Synopsys' multi-physics simulation capabilities, which are essential for complex 3D-IC designs, where thermal density can have significant repercussions. The acquisition is expected to be finalized in the first half of 2025. Worldwide semiconductor revenue ... » read more

Blog Review: Jan. 10
By Liz Allan - 10 Jan, 2024 - Comments: 0

Keysight’s Jenn Mullen explains how ChatGPT’s tools can help quality assurance (QA) engineers and software testers overcome test automation debt, and become more productive and able to deliver consistently high-quality products to market faster. Siemens’ Keith Felton discusses how the paradigm of “shift-left” power delivery analysis has emerged as a critical methodology in addressi... » read more

Glass Substrates Gain Foothold In Advanced Packages
By Gregory Haley - 09 Jan, 2024 - Comments: 2

Glass substrates are starting to gain traction in advanced packages, fueled by the potential for denser routing and higher signal performance than the organic substrates used today. There are still plenty of problems to solve before this approach becomes mainstream. While glass itself is cheap and shares some important physical similarities to silicon, there are challenges with buildup, stre... » read more

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