Metrology Advances Step Up To Sub-2nm Device Node Needs


Metrology and inspection are dealing with a slew of issues tied to 3D measurements, buried defects, and higher sensitivity as device features continue to shrink to 2nm and below. This is made even more challenging due to increasing pressure to ramp new processes more quickly. Metrology tool suppliers must exceed current needs by a process node or two to ensure solutions are ready to meet tig... » read more

From Reaction To Prevention In Data Center RAS


The rise of artificial intelligence (AI), cloud services, and IoT has fueled the rapid expansion of hyperscale data centers. These massive facilities house thousands of servers, all working to support an increasingly digital world. But as the scale of data centers grows, so too does the need for reliable and high-performance semiconductors. Semiconductor failures and inconsistencies can cause s... » read more

New Challenges In IC Reliability


Experts at the Table: Semiconductor Engineering sat down to discuss reliability of chips, how it is changing, and where the new challenges are, with Steve Pateras, vice president of marketing and business development at Synopsys; Noam Brousard, vice president of solutions engineering at proteanTecs; Harry Foster, chief verification scientist at Siemens EDA; and Jerome Toublanc, high-tech soluti... » read more

Redefining RAS in Datacenters with Real-Time Health Monitoring


Abstract Hyperscale datacenters require intense computational power for compute-intensive tasks, such as AI, data analytics, machine learning, and big data processing. They leverage parallel processing across multiple computers, in high-density servers, to handle complex tasks efficiently. This uses specialized, powerful processors and training and inference of specific GPUs or ASICs. Such c... » read more

Chip Industry Week In Review


Imec announced a new automotive chiplet consortium to evaluate which different architectures and packaging technologies are best for automotive applications. Initial members includes Arm, ASE, Cadence, Siemens, Synopsys, Bosch, BMW, Tenstorrent, Valeo, and SiliconAuto. Imec also launched star, a global network bringing together automotive and semiconductor innovators to address technological c... » read more

Real-Time Safety Monitoring


Various types of semiconductor test will determine whether a chip is free of defects and meets the specification, but understanding how it's behaving in the field under real workloads and harsh ambient conditions may be very different in automotive applications, where vibration, heat, cold can disrupt the normal functioning of a chip over time and reduce its lifespan. Alex Burlak, vice presiden... » read more

AI/ML’s Role In Design And Test Expands


The role of AI and ML in test keeps growing, providing significant time and money savings that often exceed initial expectations. But it doesn't work in all cases, sometimes even disrupting well-tested process flows with questionable return on investment. One of the big attractions of AI is its ability to apply analytics to large data sets that are otherwise limited by human capabilities. In... » read more

Real-Time Safety Monitoring for Predictive and Prescriptive Maintenance in Advanced Automotive Electronics


Software Defined, Electric, and Autonomous vehicles are driving new roadmaps for advanced electronics. Centralized architectures have introduced cutting-edge ECUs and SOCs. Coupled with stringent standardization, automotive manufacturers and OEMs are tasked with achieving functional safety in an ever-developing landscape. Maintaining safety standards without compromising performance and cos... » read more

Chip Industry Week In Review


The Design Automation Conference morphed into the Chips to Systems Conference, reflecting an industry shift from monolithic SoCs to assemblies of chiplets in various flavors of advanced packaging. The change drew a slew of students and a resurgent buzz, fueled by discussions about heterogeneous integration, reliability, and ways to leverage AI/ML to speed up design and verification processes. ... » read more

Datacenter Chipmaker Achieves Double-Digit Power Reduction with Next-Gen Voltage Scaling


The Customer A fabless chipmaker making 5nm networking chips for datacenters. The Challenge High power consumption due to excessive voltage guard-bands What You'll Discover: Learn how the customer safely decreased the voltage from 650 mV to an average of 608 mV, resulting in a 12.5% dynamic power reduction. This significant optimization helped the chipmaker stand out as a low-pow... » read more

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