tag: quantum effects

Making PUFs Even More Secure
By Bryon Moyer - 06 Jan, 2022 - Comments: 0

As security has become a must-have in most systems, hardware roots of trust (HRoTs) have started appearing in many chips. Critical to an HRoT is the ability to authenticate and to create keys – ideally from a reliable source that is unviewable and immutable. “We see hardware roots of trust deployed in two use models — providing a foundation to securely start a system, and enabling a se... » read more

Quantum Effects At 7/5nm And Beyond
By Ed Sperling - 23 May, 2018 - Comments: 5

Quantum effects are becoming more pronounced at the most advanced nodes, causing unusual and sometimes unexpected changes in how electronic devices and signals behave. Quantum effects typically occur well behind the curtain for most of the chip industry, baked into a set of design rules developed from foundry data that most companies never see. This explains why foundries and manufacturing e... » read more

System Bits: March 20
By Ann Mutschler - 20 Mar, 2018 - Comments: 0

Design has consequences Carnegie Mellon University design students are exploring ways to enhance interactions with new technologies and the power of artificial intelligence. Assistant Professor Dan Lockton teaches the course, "Environments Studio IV: Designing Environments for Social Systems" in CMU's School of Design and leads the school's new Imaginaries Lab. “We want the designers of ... » read more

Uncertainty Grows For 5nm, 3nm
By Mark LaPedus - 19 Dec, 2016 - Comments: 4

As several chipmakers ramp up their 10nm finFET processes, with 7nm just around the corner, R&D has begun for 5nm and beyond. In fact, some are already moving full speed ahead in the arena. [getentity id="22586" comment="TSMC"] recently announced plans to build a new fab in Taiwan at a cost of $15.7 billion. The proposed fab is targeted to manufacture TSMC’s 5nm and 3nm processes, whic... » read more

System Bits: Sept. 20
By Ann Mutschler - 20 Sep, 2016 - Comments: 0

Improving Torque Sensing In an advance that could bring new types of sensors and studies in quantum mechanics, Purdue University researchers have levitated a tiny nanodiamond particle with a laser in a vacuum chamber, using the technique for the first time to detect and measure its torsional vibration. The team said the experiment represents a nanoscale version of the torsion balance used i... » read more

One-On-One: Dave Hemker
By Ed Sperling - 19 May, 2016 - Comments: 0

Dave Hemker, CTO at [getentity id="22820" comment="Lam Research"], sat down with Semiconductor Engineering to look at some of the key issues on the process and manufacturing side, and some of the key developments that will reshape the semiconductor industry in the future. What follows are excerpts of that conversation. SE: One of the big discussion topics these days is [getkc id="208" commen... » read more

Industry Road Map Under Construction
By Ed Sperling - 21 Jan, 2016 - Comments: 0

While most engineers think in terms of PPA—the classic power, performance and area tradeoffs—their bosses tend to see the world in terms of risk vs. opportunity. Until 22nm, these two objectives moved forward at roughly the same pace, despite the growing technical challenges of fitting more functionality into an SoC. Much has changed since then, and even more will change over the next f... » read more

Moving Electrons Is Getting Harder
By Ed Sperling - 13 Aug, 2015 - Comments: 1

Numerous executives across the ecosystem—from EDA and equipment companies to foundries—recently have stated that Moore's Law has at least 10 more years of life. This is interesting math, considering the semiconductor industry is now working on 10nm, with chips expected to roll out next year. So given that Moore's Law is on a two-year cadence of doubling the number of transistors every 24... » read more

Here Comes 7nm
By Ed Sperling - 09 Jul, 2015 - Comments: 0

A consortium of companies involving IBM, GlobalFoundries and Samsung has rolled out the first 7nm test chip using silicon germanium as a substrate, using EUV to pattern multiple layers. While this doesn't mean the cost equation is even close to being solved, or that more than a handful of companies will push forward to that node anytime soon using SiGe as the substrate material, it does cre... » read more

Moore Memory Problems
By Brian Bailey - 09 Jul, 2015 - Comments: 0

The six-transistor static memory cell (SRAM) has been the mainstay of on-chip memory for several decades and has stood the test of time. Today, many advanced SoCs have 50% of the chip area covered with these memories and so they are critical to continued scaling. “The SRAM being used in modern systems is similar to the SRAM they were using in the 1970s and 1980s,” says Duncan Bremner, ch... » read more

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