Balancing Power And Heat In Advanced Chip Designs


Power and heat use to be someone else's problem. That's no longer the case, and the issues are spreading as more designs migrate to more advanced process nodes and different types of advanced packaging. There are a number of reasons for this shift. To begin with, there are shrinking wire diameters, thinner dielectrics, and thinner substrates. The scaling of wires requires more energy to driv... » read more

Week In Review: Design, Low Power


Earnings and Acquisitions Siemens will acquire Avery Design Systems, a simulation-independent verification IP supplier, in the first quarter of fiscal year 2023. The terms of the transaction were not disclosed. Siemens executives say the acquisition will “enhance Siemens’ offerings across mainstream verification IP segments, while further extending Siemens verification solutions into area... » read more

Memory-Based Cyberattacks Become More Complex, Difficult To Detect


Memories are becoming entry points for cyber attacks, raising concerns about system-level security because memories are nearly ubiquitous in electronics and breaches are difficult to detect. There is no end in sight with hackers taking aim at almost every consumer, industrial, and commercial segment, and a growing number of those devices connected to the internet and to each other. According... » read more

Security Solutions In A World Of IoT Devices


Internet of Things (IoT) devices are everywhere these days adding tremendous value, but unfortunately also representing unprecedented levels of risk for exploitation. Anything that is connected to the internet is potentially hackable. Securing connected devices is a challenge and is top of mind for electronics manufacturers who want to avoid the embarrassment of having their devices hacked. The... » read more

Chip Design Shifts As Fundamental Laws Run Out Of Steam


Dennard scaling is gone, Amdahl's Law is reaching its limit, and Moore's Law is becoming difficult and expensive to follow, particularly as power and performance benefits diminish. And while none of that has reduced opportunities for much faster, lower-power chips, it has significantly shifted the dynamics for their design and manufacturing. Rather than just different process nodes and half ... » read more

Chip Industry Earnings: A Mixed Bag


Editor's Note: Updated the week of Oct. 31 and Nov. 7 for additional earnings releases. Although most companies reported revenue growth, this latest round of chip industry earnings releases reflected a few major themes: Lower future quarter guidance to varying degrees, due to the recent U.S. export restrictions related to China; Negative impact of the inflationary environment on corn... » read more

Week In Review: Design, Low Power


Tools and IP Scandinavian researchers used a laser-powered chip to transmit about 1.84 petabytes of data over a fiber optic cable in one second. The scientists said the technology could lead to faster broadband speeds and reduce the amount of energy used to keep the internet running. Imec said the semiconductor industry is likely to see increasing separation of power delivery and signal rou... » read more

Fabless IDMs Redefine The Leading Edge


Large systems companies are looking more like integrated device manufacturers, designing their own advanced chips, packages, and systems for internal use. But because these are not pure-play chip companies, they are disrupting a 10-year cadence of customization and standardization that has defined the chip industry from its inception, and extending the period of innovation without the associate... » read more

Blog Review: Oct. 26


Synopsys' Teng-Kiat Lee and Sandeep Mehndiratta argue that IC design in the cloud can support an existing on-prem strategy, enable large and small enterprises to manage cost and capacity more effectively, and offer security for valuable semiconductor IP. Siemens EDA's Chris Spear finds that SystemVerilog classes are a good way to encapsulate both variables and the routines that operates on t... » read more

Securing Accelerator Blades For Datacenter AI/ML Workloads


Data centers handle huge amounts of AI/ML training and inference workloads for their individual customers. Such a vast number of workloads calls for efficient processing, and to handle these workloads we have seen many new solutions emerge in the market. One of these solutions is pluggable accelerator blades, often deployed in massively parallel arrays, that implement the latest state-of-the-ar... » read more

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