Partitioning For Better Performance And Power


Partitioning is becoming more critical and much more complex as design teams balance different ways to optimize performance and power, shifting their focus from a single chip to a package or system involving multiple chips with very specific tasks. Approaches to design partitioning have changed over the years, most recently because processor clock speeds have hit a wall while the amount of d... » read more

Blog Review: Oct. 27


Siemens EDA's Ray Salemi continues looking into using Python for verification by looking at how pyuvm simplifies and refactors the UVM TLM system to take advantage of the fact that Python has multiple inheritance and no typing. Cadence's Paul McLellan listens in as Larry Disenhof explains the impact that export regulations have on EDA tools and IP products and changes in a rapidly shifting l... » read more

Blog Review: Oct. 20


Siemens EDA's Sumit Vishwakarma promotes ironing out preliminary bugs by using a real number model to describe an analog block as a discrete floating-point model and enable it to simulate in a digital solver at near-digital simulation speeds. Synopsys' Taylor Armerding explains how including security in the software development process from the beginning planning stages onward will help IoT ... » read more

Week In Review: Design, Low Power


Nvidia acquired Oski Technology. Oski provides formal verification methodologies and consulting services, and Nvidia said that the acquisition will allow it to increase its investment in formal verification strategies. Oski's Gurugram, India, design center will become Nvidia's fourth engineering office in the country. Based in San Jose, Calif., it was founded in 2005. Terms of the deal were not... » read more

Week In Review: Auto, Security, Pervasive Computing


Automotive Synopsys and 3D virtual-environment company Dassault Systèmes are collaborating on an automotive lighting system development platform. Synopsys’ optical design tools — LucidShape, LightTools, and CODE V — will be integrated with Dassault Systèmes' 3DEXPERIENCE Platform, which is used by automotive teams from different disciplines to work together on designs and simulations. ... » read more

HBM3: Big Impact On Chip Design


An insatiable demand for bandwidth in everything from high-performance computing to AI training, gaming, and automotive applications is fueling the development of the next generation of high-bandwidth memory. HBM3 will bring a 2X bump in bandwidth and capacity per stack, as well as some other benefits. What was once considered a "slow and wide" memory technology to reduce signal traffic dela... » read more

Latency Considerations Of IDE Deployment On CXL Interconnects


Certain applications and hardware types – emerging memory, artificial intelligence/machine learning (AI/ML), and cloud servers, to name a few – can realize significant performance advantages when a low latency interface is employed. However, traditional interconnects like PCI Express (PCIe) often do not offer low enough latencies required to optimize these applications. In response, the Com... » read more

Rising Fortunes For ICs In Health Care


Semiconductors are increasingly finding their way into a variety of medical devices, after years of slow growth and largely consumer electronics types of applications. Nearly every major chipmaker has a toehold in health care these days, and many are starting to look beyond wearable such as the Apple Watch to devices that can be relied on for accuracy and reliability. Unlike in the past, the... » read more

Manufacturing Bits: Oct. 11


IC security using AFMs The National Institute of Standards and Technology (NIST) has developed a probe assisted doping technique (PAD), a technology that could help prevent counterfeit chips and electronic devices from entering the market. PAD involves creating a unique ID tag on every chip using an atomic force microscope (AFM). Basically, an AFM system incorporates a cantilever with a tin... » read more

Week In Review: Design, Low Power


Arteris IP plans to become a public company. It filed a registration statement with the SEC for an IPO, and intends to list on Nasdaq. The number of shares to be offered and the price range for the proposed offering have not yet been determined. Arteris IP provides network-on-chip interconnect IP, cache coherent interconnects, and packages to speed functional safety certification alongside IP d... » read more

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