tag: Samsung Electronics

Chip Industry Week In Review
By The SE Staff - 03 May, 2024 - Comments: 0

Samsung and Synopsys collaborated on the first production tapeout of a high-performance mobile SoC design, including CPUs and GPUs, using the Synopsys.ai EDA suite on Samsung Foundry's gate-all-around (GAA) process. Samsung plans to begin mass production of 2nm process GAA chips in 2025, reports BusinessKorea. UMC developed the first radio frequency silicon on insulator (RF-SOI)-based 3D IC ... » read more

Chip Industry Technical Paper Roundup: March 26
By Linda Christensen - 26 Mar, 2024 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library. [table id=209 /] Find last week's technical paper additions here. » read more

TCAM-SSD: A Framework For In-SSD Associative Search Using NAND Flash Memory
By Technical Paper Link - 15 Mar, 2024 - Comments: 0

A new technical paper titled "TCAM-SSD: A Framework for Search-Based Computing in Solid-State Drives" was published by researchers at University of Illinois Urbana-Champaign, Carnegie Mellon University, Samsung Electronics and Sandia National Laboratories. Abstract "As the amount of data produced in society continues to grow at an exponential rate, modern applications are incurring signific... » read more

Technical Paper Roundup: November 14
By Liz Allan - 14 Nov, 2023 - Comments: 0

New technical papers added to Semiconductor Engineering’s library this week. [table id=165 /] More Reading Technical Paper Library home » read more

Stacked Ferroelectric Memory Array Comprised Of Laterally Gated Ferroelectric Field-Effect Transistors
By Technical Paper Link - 10 Nov, 2023 - Comments: 0

A technical paper titled “Laterally gated ferroelectric field effect transistor (LG-FeFET) using α-In2Se3  for stacked in-memory computing array” was published by researchers at Samsung Electronics and Sungkyunkwan University. Abstract: "In-memory computing is an attractive alternative for handling data-intensive tasks as it employs parallel processing without the need for data transfe... » read more

Applying a Floating Gate Field Effect Transistor To A Logic-in-Memory Application Circuit Design
By Technical Paper Link - 19 Sep, 2023 - Comments: 0

A technical paper titled “Analysis of Logic-in-Memory Full Adder Circuit With Floating Gate Field Effect Transistor (FGFET)” was published by researchers at Konkuk University, Korea National University of Transportation, Samsung Electronics, and Sungkyunkwan University. Abstract: "The high data throughput and high energy efficiency required recently are increasingly difficult to implement... » read more

Week In Review: Design, Low Power
By Jesse Allen - 21 Jul, 2023 - Comments: 0

Cadence will acquire Rambus' SerDes and memory interface PHY IP business. Rambus will retain its digital IP business, including memory and interface controllers and security IP. “With this transaction, we will increase our focus on market-leading digital IP and chips and expand our roadmap of novel memory solutions to support the continued evolution of the data center and AI,” said Sean Fan... » read more

Week In Review: Design, Low Power
By Susan Rambo - 19 May, 2023 - Comments: 0

Design Ansys has signed a definitive agreement to acquire EDA tool company Diakopto. Diakopto specializes in software tools that find the cause of layout parasitics. Its products are ParagonX, for analyzing and debugging IC designs and layout parasitics, and EM/IR analysis/verification tool PrimeX. The deal is expected to close in the second quarter of 2023. SEMI’s FlexTech community issu... » read more

Reflections On Photomask Japan 2023: Embracing The Era Of Curvilinear Masks
By Seiji Nagahara - 18 May, 2023 - Comments: 0

In April, 2023, I had the privilege of participating in Photomask Japan 2023 (PMJ2023), a web conference that brought together experts and enthusiasts in the field. The conference commenced with an enlightening keynote talk by Dr. Kurt Ronse of imec on the status and challenges of the high NA EUV ecosystem, presenting roadmaps for the introduction of high NA EUV. I would like to express my grat... » read more

Assist Layers: The Unsung Heroes of EUV Lithography
By Katherine Derbyshire - 20 Apr, 2023 - Comments: 0

Most discussions of advanced lithography focus on three elements — the exposure system, photomasks, and photoresists — but that's only part of the challenge. Successfully transferring a pattern from the photomask to a physical structure on the wafer also depends on a variety of films working together, including the underlayers, the developers, and a variety of surface treatments. In fact... » read more

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