Virtual Process Game To Benchmark Performance of Humans And Computers For Design Of A Semiconductor Fabrication Process


A new technical paper titled "Human–machine collaboration for improving semiconductor process development" was published by researchers at Lam Research. Abstract: "One of the bottlenecks to building semiconductor chips is the increasing cost required to develop chemical plasma processes that form the transistors and memory storage cells These processes are still developed manually using h... » read more

New Wafer-Like And Reticle-Like Sensors Deliver Fast, Easy Measurements Inside The Process Chamber


Setup and maintenance operations for semiconductor manufacturing tools can be tedious, time-consuming, and expensive, incurring both direct costs for personnel and resources and indirect costs for lost tool time during extended commissioning of new tools and requalification of repaired or serviced tools. Wafer-like (and reticle-like) sensors (WaferSense® from CyberOptics) provide fast, easy ac... » read more

Week In Review: Semiconductor Manufacturing, Test


Semiconductor Research Corporation (SRC) released an interim roadmap for Microelectronic and Advanced Packaging Technologies (MPAT) that targets 10- to 15-year goals for 3D integration and multi-chiplet packaging. The roadmap is open for comments. Participants in the MPAT include AMD, IBM, Intel, Texas Instruments, Purdue University, SUNY Binghamton and the Georgia Institute of Technology. It i... » read more

Zero Trust Security In Chip Manufacturing


More equipment vendors and more IP are making the data in a fab much more valuable than in the past, and a potential target for hackers. What’s needed is a different approach to architecting and deploying services and equipment, so breaches can be stopped before they affect other equipment and data, and a better way of sharing data. Brian Buras, production analytics solution architect at Adva... » read more

Driving Toward Net-Zero: Key Takeaways From Semiconductor Sustainability Summit


To address the climate crisis, countries around the world are pursuing ambitious targets to achieve net-zero carbon emissions by 2050 under the Paris Agreement. In March, Taiwan redoubled its focus on decarbonization by announcing its net-zero pathway, while its Environmental Protection Administration (EPA) under the Executive Yuan is reshaping the Greenhouse Gas Reduction and Management Act in... » read more

Nova METRION Use Cases


Several use cases that we will explore for the Nova METRION® system include contamination control, process excursion prevention, reactor matching, and uniformity control. The objectives of these use cases are to detect contaminants which can kill devices, improve barrier layer and source/drain function, maintain deposition uniformity that impacts downstream processes, and ensure wafer-to-wafer... » read more

Increased Photomask Density And Its Impact On EDA


The ability to print curvilinear shapes on photomasks can have big repercussions on semiconductor design. Aki Fujimura, CEO of D2S, explains why mask rule checking has been bound by complex design rules, and why curvilinear shapes are important for reducing margin and simplifying the chip design process. » read more

Silent Data Corruption


Defects can creep into chip manufacturing from anywhere, but the problem is getting worse at advanced nodes and in advanced packages where reduced pin access can make testing much more difficult. Ira Leventhal, vice president of U.S. Applied Research and Technology at Advantest America, talks about what’s causing these so-called silent data errors, how to find them, and why it now requires ma... » read more

Systematic Yield Issues Now Top Priority At Advanced Nodes


Systematic yield issues are supplanting random defects as the dominant concern in semiconductor manufacturing at the most advanced process nodes, requiring more time, effort, and cost to achieve sufficient yield. Yield is the ultimate hush hush topic in semiconductor manufacturing, but it's also the most critical because it determines how many chips can be profitably sold. "At older nodes, b... » read more

Making Chips Yield Faster At Leading-Edge Nodes


Simulation for semiconductor manufacturing is heating up, particularly at the most advanced nodes where data needs to be analyzed in the context of factors such as variation and defectivity rates. Semiconductor Engineering sat down with David Fried, corporate vice president of computational products at Lam Research, to talk about what's behind Lam's recent acquisition of Esgee Technologies, ... » read more

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