tag: Si2

Reduced Power To The People!
By Steve Schulz - 29 May, 2014 - Comments: 0

Fifteen years ago, many of us involved in writing the design chapter of the ITRS (International Technology Roadmap for Semiconductors) already knew that power/energy consumption eventually would become a major problem for the industry’s growth. Engineers developing microprocessors (CPUs and DSPs) and graphics engines (GPUs) led the wave of predictions, because extrapolating known trend data s... » read more

Taming The PDK Beast At DAC
By Steve Schulz - 19 May, 2014 - Comments: 0

A quick Web search on the phrase “process design kit” reveals about 48 million matches. This happens to be about 10 times larger than for the current pop dance sensation “twerking,” so I guess that’s at least something to brag about. Yet if we now add the word interoperability to our PDK search, we find only 200K matches, or less than 0.5% — and therein exposes the chronic problem w... » read more

The Week In Review: Design
By Ed Sperling - 16 May, 2014 - Comments: 0

M&A Synopsys’ Coverity subsidiary bought Kalistick, a French company that makes cloud-based solutions to boost testing efficiency by allowing engineers to identify and prioritize tests. Terms of the deal were not disclosed. Tools Cadence rolled out verification IP for the new PCI Express 4.0 architecture. The new spec supports up to 16 billion transactions per second, which is double... » read more

Inside SI2’s OpenPCell Workshop
By Steve Schulz - 03 Apr, 2014 - Comments: 1

In the last Standards and Beyond blog, we provided background on the Open Process Specification, including where pcells fit into the overall picture, and gave an invitation to the OpenPCell workshop being hosted by the Silicon Integration Initiative (Si2). The ensuing workshop, held on Jan. 29, was well attended with more than 35 companies represented across the globe. It was a gathering of man... » read more

A Perspective On Open Process Specification
By Ted Paone - 27 Jan, 2014 - Comments: 2

It is the job of the Process Design Kit (PDK) engineers to deliver a high-quality PDK that properly represents the process requirements and constraints and supports the design flows used by their customers. The PDK engineer takes multiple inputs describing the process and the devices and circuitry in the process and generates the output in the form of OpenAccess technology libraries (techDB), d... » read more

Defining The Next Standard Cell
By The SE Staff - 22 Jan, 2014 - Comments: 1

Synopsys, Intel and IBM all contributed technology to Si2 to create a standard version of parameterized cells, or PCells, for mixed-signal designs. The move is an attempt to smooth out design incompatibilities using Synopsys and Cadence technology. Cadence is the clear market leader in this space. But as more technology is developed using different vendors'  tools for integration in complex... » read more

Experts At The Table: What’s Next?
By Ed Sperling - 20 Jan, 2014 - Comments: 0

Semiconductor Engineering sat down with Sumit DasGupta, Si2; Simon Bloch, Samsung; Jim Hogan, long-time industry venture capitalist; Mike Gianfagna, vice president of marketing at eSilicon (VP of corporate marketing at Atrenta when this roundtable was held). What follows are excerpts of that discussion. SE: What’s going to really drive interest in low-power technology? Hogan: The world ... » read more

The Week In Review: System-Level Design
By Ed Sperling - 10 Jan, 2014 - Comments: 0

Cadence won a deal with Fraunhofer, which licensed its MPEG codecs for Tensilica HiFi DSP. (Cadence acquired Tensilica last year.) The AAC codecs combine speech and general-purpose audio into a unified system, which simplifies design because it works at any bit rate. Sonics won a deal with MediaTek, which licensed its NoC technology for an upcoming line of SoCs. MediaTek, based in Taiwan, is... » read more

Experts At The Table: What’s Next?
By Ed Sperling - 06 Jan, 2014 - Comments: 1

Semiconductor Engineering sat down with Sumit DasGupta, Si2; Simon Bloch, Samsung; Jim Hogan; Mike Gianfagna, vice president of marketing at eSilicon (VP of corporate marketing at Atrenta when this roundtable was held). What follows are excerpts of that discussion. SE: The future of technology isn’t just about technology. It’s about people and regulations, as well. Where are the hurdles ... » read more

Where Is 2.5D?
By Ed Sperling - 19 Dec, 2013 - Comments: 3

After nearly five years of concentrated research, development, test chips and characterization, 2.5D remains a possibility for many companies but a reality for very few. So what’s taking so long and why hasn’t all of this hype turned into production runs instead of test chips? Semiconductor Engineering spent the past two months interviewing dozens of people on this subject, from chipmakers ... » read more

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