Blog Review: July 19


Siemens' Keith Felton argues that co-design-driven semiconductor package planning and prototyping is critical for design success and points to how interchange formats enable designers to make trade-off decisions for both the package and the board and communicate those recommendations back to the other design team in formats that are native to their tools. Cadence's Xin Mu explains precoding ... » read more

Week In Review: Semiconductor Manufacturing, Test


SEMICON West returned in force this week, with a focus on AI and deep learning  in semiconductor manufacturing, security, heterogenous ICs, and the march toward a $1 trillion chip market. Lam Research President and CEO, Tim Archer, opened with the keynote presentation. Fig. 1: SEMICON West panel: AI’s influence on growth, China-U.S. trade war, and the importance of climate policy were... » read more

Week In Review: Design, Low Power


DAC and SEMICON WEST rebounded this year, focusing on everything from security to chiplets and smart manufacturing. Panel at DAC conference: Left to right, ARM’s Brian Fuller (moderator), Joe Costello (Metrics, Kwikbit, Arrikto, Acromove), and Wally Rhines (Cornami). Source: Semiconductor Engineering/Ann Mutschler EDA and IP remain strong, approaching $4 billion in Q1, according to ... » read more

DAC/Semicon West Addresses Top Issues, Trends For Chips


The Design Automation Conference (DAC) 2023 and Semicon West returned in full force this week, drawing in more attendees and sponsor companies than since before the pandemic. At times, booth traffic was four to five deep, blocking aisles, and standing room only was common at presentations. Hot topics included generative AI and the underlying semiconductor technology, data security, reliabili... » read more

Pinpointing Timing Delays in Complex SoCs


Telemetry circuits are becoming a necessity in complex heterogeneous chips and packages to show how these devices are behaving post-production, but fusing together relevant data to identify the sources of problems adds its own set of challenges. In the past, engineering teams could build margin into chips to offset any type of variation. But at advanced nodes and in advanced packages, tolera... » read more

How To Use S-Parameters For Power Module Verification


By Wilfried Wessel (Siemens EDA), Simon Liebetegger (University of Applied Sciences Darmstadt), and Florian Bauer (Siemens EDA) Power modules are high-power switching circuits that convert DC- in AC-currents in electric vehicles, renewable energy, and many more applications. New materials [14] and device technologies [14], such as wide bandgap semiconductors, including silicon carbide (SiC) ... » read more

Confusion Grows Over Sensor Fusion In Autos


A key strategy for fully autonomous vehicles is the ability to fuse together inputs from multiple sensors, which is essential for making safe and secure decisions, but it's turning out to be much harder than first imagined. There are multiple problems that need to be solved, including how to partition, prioritize, and ultimately combine different types of data, and how to architect the proce... » read more

Blog Review: June 28


In a podcast, Siemens' Spencer Acain discusses the role of AI and machine learning in IC verification and how it could help address noise by analyzing different signals from the diagnosis data to figure out the real root cause of a failure. Synopsys' Ian Land and Ron DiGiuseppe find that designers of aerospace microelectronics are applying lessons and technologies learned from the automotive... » read more

New Age Solution For Data Integrity And Authenticity


With the advent of faster processing chips, the rate of data transfer has increased enormously. Be it artificial intelligence (AI), the Internet of Things (IOT), compute intensive analytics, or cloud computing, the demand for processing data in a fraction of a second is huge. Chips with superfast computing capabilities are used in applications where malfunctions can be life threatening, such as... » read more

Not All There: Heterogeneous Multiprocessor Design Tools


The design, implementation, and programming of multicore heterogeneous systems is becoming more common, often driven by the software workloads, but the tooling to help optimize the processors, interconnect, and memory are disjointed. Over the past few years, many tools have emerged that help with the definition and implementation of a single processor, optimized for a given set of software. ... » read more

← Older posts Newer posts →