Scaling, Advanced Packaging, Or Both


Chipmakers are facing a growing number of challenges and tradeoffs at the leading edge, where the cost of process shrinks is already exorbitant and rising. While it's theoretically possible to scale digital logic to 10 angstroms (1nm) and below, the likelihood of a planar SoC being developed at that nodes appears increasingly unlikely. This is hardly shocking in an industry that has heard pr... » read more

Bespoke Silicon Redefines Custom ASICs


Semiconductor Engineering sat down to discuss bespoke silicon and what's driving that customization with Kam Kittrell, vice president of product management in the Digital & Signoff group at Cadence; Rupert Baines, chief marketing officer at Codasip; Kevin McDermott, vice president of marketing at Imperas; Mo Faisal, CEO of Movellus; Ankur Gupta, vice president and general manager of Siemens... » read more

Telecare Challenges: Secure, Reliable, Lower Power


The adoption of telecare using a variety of connected digital devices is opening the door to much more rapid response to medical emergencies, as well as more consistent monitoring, but it also is adding new challenges involving connectivity, security, and power consumption. Telecare has been on the horizon for the better part of two decades, but it really began ramping with improvements in s... » read more

Heterogenous Integration Creating New IP Opportunities


The design IP market has long been known for constant change and evolution, but the industry trend toward heterogenous integration and chiplets is creating some new challenges and opportunities. Companies wanting to stake out a claim in this area have to be nimble, because there will be many potential standards introduced, and they are likely to change quickly as the industry explores what is r... » read more

Using AI To Speed Up Edge Computing


AI is being designed into a growing number of chips and systems at the edge, where it is being used to speed up the processing of massive amounts of data, and to reduce power by partitioning and prioritization. That, in turn, allows systems to act upon that data more rapidly. Processing data at the edge rather than in the cloud provides a number of well-documented benefits. Because the physi... » read more

Data Management Evolves


Semiconductor Engineering sat down to discuss data management challenges with Jerome Toublanc, business development executive at Ansys; Kam Kittrell, vice president of product management in the Digital & Signoff Group at Cadence; Simon Rance, vice president of marketing at Cliosoft; Rob Conant, vice president of software and ecosystem at Infineon Technologies; and Michael Munsey, senior dir... » read more

Machine Learning Application For Early Power Analysis Accuracy Improvement


In this paper, we introduce a machine learning (ML) application that accurately estimates the switching power of the cells without needing the SPEF file (SPEF less PA flow). Three ML models (multi-linear regression, random forest and decision tree) were trained and tested on different industrial designs at 7nm technology. They are trained using different cells’ properties available, SPEF, and... » read more

Software Infrastructure For Silicon Lifecycle Management


Semiconductor technology continues to deliver higher levels of logic density in the era of nanometer processes. System-on-chip (SoC) teams can deliver even higher functionality when coupled with the massive integration possibilities of three-dimensional integrated circuit (3DIC) architectures. However, this growth must be matched by increases in capabilities and productivity in the collection a... » read more

Finding Frameworks For End-To-End Analytics


End-to-end analytics can improve yield and ROI on tool purchases, but reaping those benefits will require common data formats, die traceability, an appropriate level of data granularity — and a determination of who owns what data. New standards, guidelines, and consortium efforts are being developed to remove these barriers to data sharing for analytics purposes. But the amount of work req... » read more

E-beam’s Role Grows For Detecting IC Defects


The perpetual march toward smaller features, coupled with growing demand for better reliability over longer chip lifetimes, has elevated inspection from a relatively obscure but necessary technology into one of the most critical tools in fab and packaging houses. For years, inspection had been framed as a battle between e-beam and optical microscopy. Increasingly, though, other types of insp... » read more

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