tag: Siemens EDA

Shifting Left In P&R With In-Design Signoff Fill For Faster And More Accurate Tapeouts
By Srinivas Velivala - 09 Dec, 2021 - Comments: 0

Place and route (P&R) engineers are always on the lookout for ways to optimize their design flows to ensure designs meet their design power, performance, and area (PPA) goals while also hitting tapeout deadlines. The introduction of the Calibre RealTime Digital interface made Calibre nmDRC and Calibre nmDRC Recon design rule checking (DRC) verification available during the P&R process t... » read more

Veloce Prototyping Solutions Accelerate Verification Of HPC AI-Enabled SoCs
By Siemens EDA - 08 Dec, 2021 - Comments: 0

This white paper goes through the journey of understanding how to meet quality requirements and accelerate time-to-market for your company’s latest flagship high performance computing (HPC) artificial intelligence (AI)-enabled system-on-chip (SoC) design. The starting point in the journey explores the use cases for designs illustrating the impact HPC AI-enabled systems and resources have on o... » read more

Big Changes Ahead For Inside Auto Cabins
By Bryon Moyer - 08 Dec, 2021 - Comments: 0

The space we occupy inside our vehicles is poised to change from mere enclosure to participant in the driving experience. Whether for safety or for comfort, a wide range of sensors are likely to appear that will monitor the “contents” of the vehicle. The overall approach is referred to as an in-cabin monitoring system (ICMS), but the specific applications vary widely. “In-cabin sensing... » read more

Blog Review: Dec. 8
By Jesse Allen - 08 Dec, 2021 - Comments: 0

Arm's Shidhartha Das introduces a method to achieve fast yet accurate power modelling for both design and runtime power introspection within the same unified framework using machine learning and data science approaches. Synopsys' Mike Borza warns that the semiconductor industry is facing a flood of counterfeit chips and why being aware of different types of semiconductor scams and tackling t... » read more

Using Manufacturing Data To Boost Reliability
By Ed Sperling and Ann Mutschler - 07 Dec, 2021 - Comments: 0

As chipmakers turn to increasingly customized and complex heterogeneous designs to boost performance per watt, they also are demanding lower defectivity and higher yields to help offset the rising design and manufacturing costs. Solving those issues is a mammoth multi-vendor effort. There can be hundreds of process steps in fabs and packaging houses. And as feature sizes continue to shrink, ... » read more

Speeding Up Scan-Based Volume Diagnosis
By Bryon Moyer - 07 Dec, 2021 - Comments: 0

In the critical process known as new-product bring-up, it’s a race to get new products to yield as quickly as possible. But the interplay between increasingly complex aspects of designs and process makes it difficult to find root causes of yield issues so they can be fixed quickly. Advanced processes have very high defectivity, and learning must be fast and effective. While progress has be... » read more

Streaming Scan Network: An Efficient Packetized Data Network For Testing Of Complex SoCs
By Siemens EDA - 07 Dec, 2021 - Comments: 0

Originally presented at the 2020 International Test Conference by Siemens and Intel authors, this paper describes the Tessent Streaming Scan Network technology and demonstrates how this packetized data network optimizes test time and implementation productivity for today’s complex SoCs. The author-submitted version of the IEEE paper is reprinted here with permission. Authors: Jean-Françoi... » read more

Success Stories For Packetized Scan Data
By Geir Eide - 07 Dec, 2021 - Comments: 0

Some new design-for-test (DFT) technologies are difficult, expensive, or risky to implement but offer significant benefits. Other technologies are easy to implement but offer minor improvements. The calculation of whether (or when) to adopt new technology includes consideration of the pressures of DFT today—design complexity, the lack of flexibility in hardwiring scan channels, the proliferat... » read more

Big Payback For Combining Different Types Of Fab Data
By Anne Meixner - 07 Dec, 2021 - Comments: 1

Collecting and combining diverse data types from different manufacturing processes can play a significant role in improving semiconductor yield, quality, and reliability, but making that happen requires integrating deep domain expertise from various different process steps and sifting through huge volumes of data scattered across a global supply chain. The semiconductor manufacturing IC data... » read more

Improving Energy And Power Efficiency In The Data Center
By Ann Mutschler - 06 Dec, 2021 - Comments: 0

Energy costs in data centers are soaring as the amount of data being generated explodes, and it's being made worse by an imbalance between increasingly dense processing elements that are producing more heat and uneven server utilization, which requires more machines to be powered up and cooled. The challenge is to maximize utilization without sacrificing performance, and in the past that has... » read more

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