tag: signal integrity

Signal Integrity Through The Years
By Paul McLellan - 06 Feb, 2020 - Comments: 0

Yesterday, I started to talk about how new technologies find their way over time into EDA tools in my post How Technologies Get into EDA. Let's look at signal integrity as an example. We used not to worry about signal integrity at all. The first time anything like that impinged on my consciousness was in the early 1980s when we realized that we needed to start to consider the inductance... » read more

Thermal Challenges In Advanced Packaging
By Ed Sperling - 02 Dec, 2019 - Comments: 2

CT Kao, product management director at Cadence, talks with Semiconductor Engineering about why packaging is so complicated, why power and heat vary with different use cases and over time, and why a realistic power map is essential particularly for AI chips, where some circuits are always on.   Interested in more Semiconductor Engineering videos? Sign-up for our YouTube channel here » read more

GDDR6 Drilldown: Applications, Tradeoffs And Specs
By Ed Sperling - 15 Nov, 2019 - Comments: 0

Frank Ferro, senior director of product marketing for IP cores at Rambus, drills down on tradeoffs in choosing different DRAM versions, where GDDR6 fits into designs versus other types of DRAM, and how different memories are used in different vertical markets. » read more

Pushing Memory Harder
By Brian Bailey - 14 Oct, 2019 - Comments: 4

In an optimized system, no component is waiting for another component while there is useful work to be done. Unfortunately, this is not the case with the processor/memory interface. Put simply, memory cannot keep up. Accessing memory is slow, and it can consume a significant fraction of the power budget. And the general consensus is this problem is not going away anytime soon, despite effort... » read more

Multiphysics Simulations for AI Silicon to System Success
By Ansys - 09 Oct, 2019 - Comments: 0

Achieving power efficiency, power integrity, signal integrity, thermal integrity and reliability is paramount for enabling product success by overcoming the challenges of size and complexity in AI hardware and optimizing the same for rapidly evolving AI software. ANSYS’ comprehensive chip, package and system solutions empower AI hardware designers by breaking down design margins and siloed de... » read more

GDDR Accelerates Artificial Intelligence And Machine Learning
By Frank Ferro - 16 Jul, 2019 - Comments: 0

The origins of modern graphics double data rate (GDDR) memory can be traced back to GDDR3 SDRAM. Designed by ATI Technologies, GDDR3 made its first appearance in NVidia’s GeForce FX 5700 Ultra card which debuted in 2004. Offering reduced latency and high bandwidth for GPUs, GDDR3 was followed by GDDR4, GDDR5, GDDR5X and the latest generation of GDDR memory, GDDR6. GDDR6 SGRAM supports a ma... » read more

Blog Review: June 19
By Jesse Allen - 19 Jun, 2019 - Comments: 0

Mentor's Rebecca Lord digs into signal integrity complications and why today's high frequency signals make it important to understand the physics of transmission lines. Cadence's Meera Collier points to the need to recognize diversity and nuance when compiling AI training datasets and avoid the oversimplification that can lead to bias. Synopsys' Deepak Nagaria checks out the new features ... » read more

Delivering High-Speed Communications: The Back Story
By Mike Gianfagna - 30 May, 2019 - Comments: 0

Back in January, I posted a blog about what it takes to deliver high-speed communication. In that post, I talked about a new test board for our high-speed 7nm 56G PAM4 & NRZ DSP-based long-reach SerDes. We collaborated with several companies to build a high-precision board that could be used to test our SerDes in a system context. At that time, we were just finishing the opening act for thi... » read more

Engineering The Signal For GDDR6
By Shawn Nikoukary - 09 May, 2019 - Comments: 0

DDR1 through DDR3 had their challenges, but speeds were below one gigabit and signal integrity (SI) challenges were more centered around static timing and running pseudo random binary sequence (PRBS) simulations. Now, with GDDR6, we are working on 16 to 20 gigabits per second (Gbps) signaling and even faster in the near future. As a result, engineering the signal for GDDR6 will require careful ... » read more

Latency Under Load: HBM2 vs. GDDR6
By Ed Sperling - 09 May, 2019 - Comments: 0

Steven Woo, Rambus fellow and distinguished inventor, explains why data traffic and bandwidth are critical to choosing the type of DRAM, options for improving traffic flow in different memory types, and how this works with multiple memory types.   Related Video GDDR6 - HBM2 Tradeoffs Why designers choose one memory type over another. Applications for each were clearly delineate... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2025 SMG   |  Terms of Service  |  Privacy Policy