Replacement Gate High-k/Metal Gate nMOSFETs Using A Self-Aligned Halo-Compensated Channel Implant

By UMC - 16 Jun, 2021 - Comments: 0

A device design technique for boosting output resistance (Rout) characteristics of long-channel halo-doped nMOSFETs for replacement gate (RMG) high-k/metal gate (HK/MG) devices is proposed based on numerical simulations. We show that the self-aligned halo-compensated channel implant (HCCI) that is carried out after dummy poly gate removal provides compensation for the conventional halo doping. ... » read more

FPGA Prototyping: Supersizing Scale And Performance

By Synopsys - 11 May, 2021 - Comments: 0

Given the cost of re-spinning a system-on-chip (SoC), semiconductor companies have always looked for ways to verify and validate the SoC before tape-out. Prototyping using field programmable gate arrays (FPGAs) became a key methodology as part of this pre-silicon verification and validation effort. Click here to read more. » read more

Distributed Development Of IP And SoC In Compliance With Automotive ISO 26262

By Synopsys - 24 Feb, 2021 - Comments: 0

Automotive functional safety System-on-Chips (SoCs) for Advanced Driver Assistance Systems (ADAS) contain several complex Intellectual Property (IP) cores. The IP cores are developed as a Safety Element out of Context (SEooC), meaning the context of the end application is not fully known at delivery time. In addition, IP development might be distributed across the globe. To reduce the risk of f... » read more

Accelerating SoC Verification Closure With Unified Verification Management Solution

By Synopsys - 08 Feb, 2021 - Comments: 0

Functional verification of system-on-chip (SoC) designs requires best-in-class tools linked together in a unified solution in order to address exponential complexity challenges. There is no one-size-fits-all method for verification. Complex designs require a combination of virtual prototyping, static checks, formal analysis, simulation, emulation and FPGA prototyping. The execution of all the t... » read more

112G SerDes Modeling And Integration Considerations

By Priyank Shukla - 14 Jan, 2021 - Comments: 0

The ever-increasing demand for compute power and data processing in accelerators, intelligence processing units (IPUs), GPUs, as well as training and inference SoCs is driving the adoption of 112G SerDes PHY IP solutions. Ensuring a reliable Ethernet link and efficient integration are the most essential requirements that designers need to meet. IBIS-AMI modeling can help predict SerDes link per... » read more

The Power Of Virtual Prototyping: From SoC Design To Software Development

By Arm - 13 Jan, 2021 - Comments: 0

Virtual prototypes and hardware design: More powerful and complex integrated circuits and System-on-Chip (SoC) designers have a daunting task at both the hardware and software level. SoC architects need a method for early evaluation of hardware components, known as Intellectual Property (IP) blocks, that will have direct impact on the commercial success of the SoC. There are a range of complex ... » read more

Multi-Layer Deep Data Performance Monitoring And Optimization

By proteanTecs - 11 Jan, 2021 - Comments: 0

Combining functional and parametric monitoring of the real-world behavior of complex SoCs provides a powerful new approach that facilitates performance optimization during development and in the field, improves security and safety, and enables predictive maintenance to prevent field failures. proteanTecs’ Universal Chip Telemetry (UCT) and Siemens’ Tessent Embedded Analytics are complementa... » read more

How 5G Is Influencing Silicon Design

By Synopsys - 21 Dec, 2020 - Comments: 0

5G is introducing a wide array of challenges in next-generation SoCs that go well beyond high bandwidth wireless. These include increasing system bandwidth, lowering SoC latency, and reducing power significantly for the connected internet of things. Using trusted standards-based IP and proven processing and analog IP at the most aggressive process technology nodes is needed to bring 5G to marke... » read more

Xilinx Reduces Risk And Increases Efficiency For IEC61508 And ISO26262 Certified Safety Applications

By Xilinx - 01 Dec, 2020 - Comments: 0

This white paper introduces key dependability aspects for industrial and automotive customers who are designing and developing programmable electronic equipment for safety applications using Xilinx FPGA and SoC devices. The main focus of this white paper is to explain how to create solutions with highly integrated, high-performance certifiable systems that target IEC 61508 / ISO 26262 norms. Th... » read more

Silo Busting In The Design Flow

By Brian Bailey - 24 Nov, 2020 - Comments: 0

An increasing number of dependencies in system design are forcing companies, people, tools, and flows to become more collaborative. Design and EDA companies must adapt to this new reality because it has become impossible for anyone to do it all by themselves. Moreover, what happens in manufacturing and packaging needs to be considered up front, and what gets designed in the design phase may ... » read more

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tag: SoC

Replacement Gate High-k/Metal Gate nMOSFETs Using A Self-Aligned Halo-Compensated Channel Implant

FPGA Prototyping: Supersizing Scale And Performance

Distributed Development Of IP And SoC In Compliance With Automotive ISO 26262

Accelerating SoC Verification Closure With Unified Verification Management Solution

112G SerDes Modeling And Integration Considerations

The Power Of Virtual Prototyping: From SoC Design To Software Development

Multi-Layer Deep Data Performance Monitoring And Optimization

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Xilinx Reduces Risk And Increases Efficiency For IEC61508 And ISO26262 Certified Safety Applications

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