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Variation At 10/7nm


Klaus Schuegraf, vice president of new products and solutions at PDF Solutions, explains why variability is a growing challenge at advanced nodes, why middle of line is now one of the big problem areas, and what happens when a via is misaligned due to a small process variation. https://youtu.be/jQfggOnxZJQ » read more

Mission Profiles


In the field of electronic systems, the mission profile has been one of the key concepts since the start of the scientific examination of the subject of reliability. Its exact meaning varies with time and the industry using it. In particular, over the course of increasing digitalization and networking in the context of IoT and the opportunities resulting from this, the subject of mission profil... » read more

3D NAND Flash Wars Begin


3D NAND suppliers are gearing up for a new battle amid a period of price and competitive pressures, racing each other to the next technology generations. Competition is intensifying as a new player enters the 3D NAND market—China’s Yangtze Memory Technologies Co. (YMTC). Backed by billions of dollars in funding from the Chinese government, YMTC recently introduced its first 3D NAND techn... » read more

On-Chip Monitoring Of FinFETs


Stephen Crosher, CEO of Moortec, sat down with Semiconductor Engineering to discuss on-chip monitoring and its impact on power, security and reliability, including predictive maintenance. What follows are excerpts of that conversation. SE: What new problems are you seeing in design? Crosher: There are challenges emerging for companies working on advanced nodes, including scaling and trans... » read more

Aging Effects


Tech Talk: Fraunhofer EAS' group manager for quality and reliability, Andre Lange, talks about how to model aging effects and why the problems are becoming more difficult at advanced nodes. https://youtu.be/XHWww2PE7aY » read more

Temporary Bonding: Enabling the Next Generation of Ultrathin Wafers


Innovative materials are critical for maintaining integrity during advanced semiconductor manufacturing processes. Temporary bonding is being enabled by these new materials and is making a name for itself in the next generation of ultrathin wafer manufacturing. Semiconductor wafers are being forced to become thinner as the push to shrink feature sizes and introduce full-scale 3D integration ... » read more

The Next 5 Years Of Chip Technology


Semiconductor Engineering sat down to discuss the future of scaling, the impact of variation, and the introduction of new materials and technologies, with Rick Gottscho, CTO of [getentity id="22820" comment="Lam Research"]; Mark Dougherty, vice president of advanced module engineering at [getentity id="22819" comment="GlobalFoundries"]; David Shortt, technical fellow at [getentity id="22876" co... » read more