Week In Review: Design, Low Power


M&A Intel acquired Habana Labs, a maker of programmable deep learning accelerators for the data center, for approximately $2 billion. Based in Israel, Habana was founded in 2016 but only emerged from stealth in September 2018 with the release of its first inference chip. Intel's VC arm, Intel Capital, previously invested in the startup. Intel has made numerous M&A moves in the AI space... » read more

Week In Review: IoT, Automotive, Security


Automotive/Mobility Synopsys and Porsche Consulting, a management consultancy that grew out of Porsche’s automotive expertise, have collaborated on a framework for accelerating the development of automotive SoCs, using automotive IP. The process includes Synopsys' Triple Shift-Left — a which uses virtual prototyping and automotive IP to test software and hardware in the design stage — an... » read more

Crossed Wires On Domains


Clock, power and reset domains can form a tangled web if systems are not architected correctly. Wires that cross these domains often require special treatment and additional analysis. They are all evolving independently, meaning that designers must keep up with the latest methodology guidelines and tool capabilities to ensure problems do not remain hidden until they get exposed in silicon. C... » read more

AI Chips Driving Need For New Test Implementation Methodologies


Artificial intelligence has never been more in the news than it is today.  From picking stock market investments to autonomous driving, we have heard about what AI can do when it works and what happens when it goes awry. The consequences are huge if AI doesn’t work which puts a lot of pressure on hardware engineers to ensure that their chips can be extensively tested for proper and safe func... » read more

Verdi Transaction Debug Platform: A Simplified Way To Debug IIP Designs And SoC


Authors: Abhishek Upadhyay, R&D Engineer, Synopsys, and Kanak Rajput, Application Engineer, Synopsys Design problems that appear in the late phases of the development cycle can be extremely difficult to track down and debug, thus putting project schedules at risk. It’s not uncommon for an engineer to run the verification test on what appears to be the main design problem, only to find the ... » read more

Blog Review: Dec. 18


Lam Research's David Haynes finds that taking advances made at 300mm and applying them via upgrades to 200mm equipment is a cost appropriate strategy to quickly improve yield and add capacity. Synopsys' Taylor Armerding looks at which of this year's many data breaches hit corporate wallets the hardest and how the cost of privacy noncompliance is expected to rise with California's CCPA and st... » read more

Week In Review: Design, Low Power


Rambus finalized its acquisition of the silicon IP, secure protocols and provisioning business from Verimatrix, formerly Inside Secure, for $45 million at closing, and up to an additional $20 million, subject to certain revenue targets in 2020. RISC-V SiFive unveiled two new product families. The SiFive Apex processor cores target mission-critical processors with Size, Weight, and Power (SW... » read more

Week in Review: IoT, Security and Automotive


Internet of Things Western Digital Corp. and Codasip are working together on Western Digital’s SweRV Core EH1, which is a RISC-V core with a 32-bit, dual superscalar, 9-stage pipeline architecture. The core, launched earlier this is aimed at embedded devices supporting data-intensive edge applications, such as storage controllers, industrial IoT, real-time analytics in surveillance systems, ... » read more

Verifying Security In Processor-based SoCs


By Ruud Derwig and Nicole Fern Security in modern systems is of utmost importance. Device manufacturers are including multiple security features and attack protections into both the hardware and software design. For example, the Synopsys DesignWare ARC Processor IP includes many security functions in its SecureShield feature set. End-product system security, however, cannot be guaranteed by ... » read more

A New Dawn For IP


The IP industry is changing again. The concept started as build once, use everywhere, but today it is more like architect once, customize everywhere. Few designs can afford sub-optimal IP for their application. The need for customized IP is driven by both leading-edge designs and the trailing markets, although for different reasons. While this customization is causing IP companies to transfo... » read more

← Older posts Newer posts →