tag: Synopsys

Blog Review: Dec. 16
By Jesse Allen - 16 Dec, 2020 - Comments: 0

Arm's Benoit Labbe investigates why battery monitoring is so important for a low-power microcontroller and shows how it was implemented in the M0N0 MCU while drawing a fraction of a nW in typical conditions. Siemens EDA's Harry Foster takes a look at how much of their time FPGA design engineers spend on verification, and the tasks that keep verification engineers the busiest. Synopsys' Sc... » read more

Automation And Fault Simulation Of Safety-Critical FPGA Designs
By Joe Mallett - 15 Dec, 2020 - Comments: 0

Functional safety is a major challenge for field programmable gate arrays (FPGAs) and other semiconductor designs. Safety requirements go beyond traditional verification, which focuses on design bugs. Chips in safety-critical applications must be able to handle a variety of faults from sources such as temperature and power extremes, device aging, radiation, ionization and component failures. Ap... » read more

Power Models For Machine Learning
By Brian Bailey - 14 Dec, 2020 - Comments: 1

AI and machine learning are being designed into just about everything, but the chip industry lacks sufficient tools to gauge how much power and energy an algorithm is using when it runs on a particular hardware platform. The missing information is a serious limiter for energy-sensitive devices. As the old maxim goes, you can't optimize what you can't measure. Today, the focus is on functiona... » read more

Week In Review: Design, Low Power
By Jesse Allen - 11 Dec, 2020 - Comments: 0

RISC-V RISC-V International CEO Calista Redmond provided an update on the state of the community during the annual RISC-V Summit: “RISC-V has had an incredible year of growth and momentum. This year, our technical community has grown 66 percent to more than 2,300 individuals in our more than 50 technical and special interest groups. We’re seeing increased market momentum of RISC-V cores, S... » read more

Week In Review: Auto, Security, Pervasive Computing
By SE Staff - 11 Dec, 2020 - Comments: 0

Automotive Self-driving car company Cruise now has driverless cars on the streets of San Francisco, Calif., reports the San Francisco Chronicle. Cruise, which is backed by General Motors, is testing five driverless cars in the urban — and very hilly — environment of San Francisco. Cruise is using an EV — the Chevy Bolt — as a test vehicle. At Level 4 driving, the cars will not have a w... » read more

What Designers Need to Know About Error Correction Code (ECC) In DDR Memories
By Vadhiraj Sankaranarayanan - 10 Dec, 2020 - Comments: 2

As with any electronic system, errors in the memory subsystem are possible due to design failures/defects or electrical noise in any one of the components. These errors are classified as either hard-errors (caused by design failures) or soft-errors (caused by system noise or memory array bit flips due to alpha particles, etc.). To handle these memory errors during runtime, the memory subsyst... » read more

Re-Architecting SerDes
By Brian Bailey - 10 Dec, 2020 - Comments: 0

Serializer/Deserializer (SerDes) circuits have been helping semiconductors move data around for years, but new process technologies are forcing it to adapt and change in unexpected ways. Traditionally implemented as an analog circuit, SerDes technology has been difficult to scale, while low voltages, variation, and noise are making it more difficult to yield sufficiently. So to remain releva... » read more

Low Power Still Leads, But Energy Emerges As Future Focus
By Ann Mutschler - 10 Dec, 2020 - Comments: 1

In 2021 and beyond, chips used in smartphones, digital appliances, and nearly all major applications will need to go on a diet. As the amount of data being generated continues to swell, more processors are being added everywhere to sift through that data to determine what's useful, what isn't, and how to distribute it. All of that uses power, and not all of it is being done as efficiently as... » read more

Waking And Sleeping Create Current Transients
By Bryon Moyer - 10 Dec, 2020 - Comments: 0

Silicon power-saving techniques are helping to reduce the power required by data centers and other high-intensity computing environments, but they’ve also added a significant challenge for design teams. As islands on high-powered chips go to sleep and wake up, the current requirements change quickly. This happens in a few microseconds, at most. The rapid change of loading creates a challen... » read more

Detecting Electrical Hazards Incurred By Inter-Voltage Domain Crossing In Custom SRAMs
By Hari Sathianathan - 09 Dec, 2020 - Comments: 0

Fast-growing markets, such as 5G, biotechnology, AI, and automotive, are driving a new wave of low-power semiconductor design requirements and, hence, more aggressive low-power management techniques are needed. Consequently, even large macros within a chip, such as SRAMs, now feature multiple voltage domains to limit power draw during light-sleep, deep-sleep, and shutdown-low-power modes. These... » read more

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