tag: Synopsys

ROM Code First
By Achim Nohl - 23 Aug, 2012 - Comments: 0

By Achim Nohl Finally, nine months after the next-generation SoC project was kicked off, the first prototype board has finally arrived! There are just six months left to get Android and Linux up and running. Because Android should take full advantage of the latest hardware additions, let’s make sure we get it ported as quickly as possible. Unfortunately, it’s not that easy. Before you c... » read more

Who Owns What And Why
By Ed Sperling - 23 Aug, 2012 - Comments: 0

Who’s calling the shots these days—and how long they’ll continue calling the shots—is turning out to be as much conjecture as playing the futures exchange. There are so many changes underway that even engineers are crossing boundaries no one ever expected and ending up in companies outside of IC design or moving from seemingly far afield into the design world. Still, there are some c... » read more

Mixed-Signal IP Design Challenges In 28nm Process And Beyond
By Various Writers - 23 Aug, 2012 - Comments: 0

As process technologies continue to scale aggressively, it is becoming more challenging when developing high-quality, high-speed mixed-signal IP. Specifically, the 28-nm process poses some unique challenges not found in 65-nm and 40-nm technology processes. This paper discusses the low power requirements found in 28-nm processes and addresses issues associated with the aggressive scaling of ... » read more

Experts At The Table: Stacked Die Reality Check
By Ed Sperling - 16 Aug, 2012 - Comments: 0

By Ed Sperling Semiconductor Manufacturing & Design sat down with Sunil Patel, principal member of the technical staff for package technology at GlobalFoundries; Steve Pateras, product marketing director at Mentor Graphics; Steve Smith, senior director of platform marketing at Synopsys; Thorsten Matthias, business development director at EVGroup; and Manish Ranjan, vice president of market... » read more

Analog Hits The Power Wall
By Ed Sperling - 09 Aug, 2012 - Comments: 0

By Ed Sperling Analog design teams are starting to encounter the same physical issues that digital design engineers began wrestling with several nodes ago—only the problems are more complicated and even more difficult to solve. At advanced nodes digital circuitry is susceptible to an array of physical effects ranging from heat, electromigration, electromagnetic interference and electrosta... » read more

Mining For Data
By Ed Sperling - 09 Aug, 2012 - Comments: 0

By Ann Steffora Mutschler Power analysis accuracy at the RTL design abstraction is a challenging problem. Smaller geometries just make the challenge of predicting accurate RTL power consumption even more difficult, which in turn impacts other design decisions such as power-grid planning and package selection. “It’s one of these things where the earlier you are in the design, even befo... » read more

The New Frontier: Low-Power Verification And Test
By Ed Sperling - 09 Aug, 2012 - Comments: 0

By Ann Steffora Mutschler By now there’s no argument that verification and test strategies must be considered at the very earliest stages of any design cycle, and when it comes to low-power designs, the advanced techniques used and design complexity make the challenges here even more daunting. Low-power verification and test strategies have been in development for a number of years, and it... » read more

The Rise Of The Power Architect
By Ed Sperling - 09 Aug, 2012 - Comments: 0

By Ann Steffora Mutschler Call them power czars, power gurus or power architects, this role within design teams is gaining importance with the need to understand, manage and control the power budget throughout the entire design process. As such, power architects are in high demand today with power architecture teams doubling in size within a year or two. Driving the need for this highly s... » read more

Routing Congestion Returns
By Ed Sperling - 26 Jul, 2012 - Comments: 0

By Ed Sperling Routing congestion has returned with a vengeance to SoC design, fueled by the advent of more third-party IP, more memory, a variety of new features, as well as the inability to scale wires at the same rate as transistors. This is certainly not a foreign concept for IC design. The markets for place and route tools were driven largely by the need to automate this kind of operat... » read more

SoC Platforms Gain Steam
By Ed Sperling - 26 Jul, 2012 - Comments: 0

By Ed Sperling Platforms are attracting far more attention from makers of SoCs because they are pre-verified and can speed time to market, but the shift isn’t so simple. It will spark major changes in the way companies design and build chips, causing significant disruption across the entire SoC ecosystem. Platforms are nothing new in the processor and software world. Intel, IBM AMD, and N... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2025 SMG   |  Terms of Service  |  Privacy Policy