tag: testing

Rebalancing Test And Yield In IC Manufacturing
By Gregory Haley - 07 Nov, 2023 - Comments: 0

Balancing yield and test is essential to semiconductor manufacturing, but it's becoming harder to determine how much weight to give one versus the other as chips become more specialized for different applications. Yield focuses on maximizing the number of functional chips from a production batch, while test aims to ensure that each chip meets rigorous quality and performance standards. And w... » read more

How To Boost ATE Power Supply Throughput
By Keysight - 26 Jul, 2023 - Comments: 0

The test engineer’s job is not an easy one. There is constant pressure to improve system throughput. This white paper will guide you on how to increase throughput to reduce costs. Increased throughput comes from faster programming and command processing times, built-in output sequencing, and arbitrary waveform capabilities. Faster testing speeds will enable more rigorous testing of devices, d... » read more

RowPress: Read-Disturb Phenomenon In DDR4 DRAM Chips
By Technical Paper Link - 15 Jul, 2023 - Comments: 0

A technical paper titled "RowPress: Amplifying Read Disturbance in Modern DRAM Chips" was published by researchers at ETH Zürich. Abstract: "Memory isolation is critical for system reliability, security, and safety. Unfortunately, read disturbance can break memory isolation in modern DRAM chips. For example, RowHammer is a well-studied read-disturb phenomenon where repeatedly opening and clo... » read more

True 3D-IC Problems
By Brian Bailey - 27 Apr, 2023 - Comments: 0

Placing logic on logic may sound like a small step, but several problems must be overcome to make it a reality. True 3D involves wafers stacked on top of each other in a highly integrated manner. This is very different from 2.5D integration, where logic is placed side-by-side, connected by an interposer. And there are some intermediate solutions today where significant memory is stacked on l... » read more

A Deeper Look into RowHammer’s Sensitivities: Experimental Analysis of Real DRAM Chips and Implications on Future Attacks and Defenses
By Technical Paper Link - 14 Nov, 2021 - Comments: 0

Abstract "RowHammer is a circuit-level DRAM vulnerability where repeatedly accessing (i.e., hammering) a DRAM row can cause bit flips in physically nearby rows. The RowHammer vulnerability worsens as DRAM cell size and cell-to-cell spacing shrink. Recent studies demonstrate that modern DRAM chips, including chips previously marketed as RowHammer-safe, are even more vulnerable to RowHammer than... » read more

Penetration Testing: A Buyer’s Guide
By Synopsys - 05 May, 2021 - Comments: 0

Data breaches continue to plague organizations—whether they’re targeted attacks from outside or malicious insiders. According to the 2020 IBM “Cost of Data Breach” report, 52% of breaches were caused by a malicious attack and the average total cost of a breach was $3.86 million. Many of these breaches are the result of combinations of errors or vulnerabilities, with attackers working th... » read more

Challenges In Printed And Disposable Chips
By Susan Rambo And Ed Sperling - 05 Mar, 2020 - Comments: 0

Printing inexpensive chips using technology developed for newspapers and magazines is gaining traction across a wide range of applications, from photovoltaic cells to sensors on a flexible substrate. But it's also adding a slew of new challenges that are unique to this approach. The world of flexible hybrid electronics (FHE) — printing integrated circuits on or attaching thin IC chips to a... » read more

Shrinking AV’s 1 Billion Test Miles
By Kevin Fogarty - 08 Oct, 2019 - Comments: 0

There is still no answer to how many miles an autonomous vehicle needs to drive before it's proven safe. But some AV developers and test companies are hoping to ease the burden a bit with automation that makes millions of real and simulated miles of road testing simpler to implement, supported by standards that make it easier to create and trade simulation scenarios. The goal is to reduce th... » read more

Design, System Integration and Testing of Radar Systems
By NI - 05 Nov, 2018 - Comments: 0

This article discusses some of the fundamental research and development challenges in both the digital and RF/millimeter wave domains (such as waveform generation, receiver algorithms and transmit/receive front ends) and addresses current and future directions in design, system integration and test. Radar applications are becoming more diverse and commercialization is accelerating due to sig... » read more

What is STS Software Bundle?
By NI - 08 Oct, 2018 - Comments: 0

The STS Software Bundle provides all the software tools and hardware drivers you need to efficiently develop and deploy test programs, interactively debug, and maintain and calibrate the NI Semiconductor Test System (STS). NI will release new bundles regularly to incorporate new functionality and hardware drivers. The STS Software Bundle includes tools for interactive measurements and debugg... » read more

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