tag: testing

A Deeper Look into RowHammer’s Sensitivities: Experimental Analysis of Real DRAM Chips and Implications on Future Attacks and Defenses
By Technical Paper Link - 14 Nov, 2021 - Comments: 0

Abstract "RowHammer is a circuit-level DRAM vulnerability where repeatedly accessing (i.e., hammering) a DRAM row can cause bit flips in physically nearby rows. The RowHammer vulnerability worsens as DRAM cell size and cell-to-cell spacing shrink. Recent studies demonstrate that modern DRAM chips, including chips previously marketed as RowHammer-safe, are even more vulnerable to RowHammer than... » read more

Penetration Testing: A Buyer’s Guide
By Synopsys - 05 May, 2021 - Comments: 0

Data breaches continue to plague organizations—whether they’re targeted attacks from outside or malicious insiders. According to the 2020 IBM “Cost of Data Breach” report, 52% of breaches were caused by a malicious attack and the average total cost of a breach was $3.86 million. Many of these breaches are the result of combinations of errors or vulnerabilities, with attackers working th... » read more

Challenges In Printed And Disposable Chips
By Susan Rambo And Ed Sperling - 05 Mar, 2020 - Comments: 0

Printing inexpensive chips using technology developed for newspapers and magazines is gaining traction across a wide range of applications, from photovoltaic cells to sensors on a flexible substrate. But it's also adding a slew of new challenges that are unique to this approach. The world of flexible hybrid electronics (FHE) — printing integrated circuits on or attaching thin IC chips to a... » read more

Shrinking AV’s 1 Billion Test Miles
By Kevin Fogarty - 08 Oct, 2019 - Comments: 0

There is still no answer to how many miles an autonomous vehicle needs to drive before it's proven safe. But some AV developers and test companies are hoping to ease the burden a bit with automation that makes millions of real and simulated miles of road testing simpler to implement, supported by standards that make it easier to create and trade simulation scenarios. The goal is to reduce th... » read more

Design, System Integration and Testing of Radar Systems
By National Instruments - 05 Nov, 2018 - Comments: 0

This article discusses some of the fundamental research and development challenges in both the digital and RF/millimeter wave domains (such as waveform generation, receiver algorithms and transmit/receive front ends) and addresses current and future directions in design, system integration and test. Radar applications are becoming more diverse and commercialization is accelerating due to sig... » read more

What is STS Software Bundle?
By National Instruments - 08 Oct, 2018 - Comments: 0

The STS Software Bundle provides all the software tools and hardware drivers you need to efficiently develop and deploy test programs, interactively debug, and maintain and calibrate the NI Semiconductor Test System (STS). NI will release new bundles regularly to incorporate new functionality and hardware drivers. The STS Software Bundle includes tools for interactive measurements and debugg... » read more

Automakers Take On More Responsibility
By Kevin Fogarty - 08 Oct, 2018 - Comments: 0

Chip and EDA companies are scrambling to deal with stiff safety regulations and harsh environmental conditions for automotive chips, but automakers are making big changes of their own to ensure all those components work together as expected. The result is a significant shift of responsibilities of companies in the automotive supply chain. Carmakers traditionally have left verification, valid... » read more

Adaptive Test With Test Escape Estimation for Mixed-Signal ICs
By Technical Paper Link - 31 Dec, 2017 - Comments: 0

Abstract: The standard approach in industry for post-manufacturing testing of mixed-signal circuits is to measure the performances that are included in the data sheet. Despite being accurate and straightforward, this approach involves a high test time since there are numerous performances that need to be measured sequentially by switching the circuit into different test configurations. Adapt... » read more

Finally, Realizing The Full Benefits Of Parallel Site-To-Site (S2S) Testing
By Guy Cortez - 08 May, 2017 - Comments: 0

A very common and well-known practice by manufacturers during the IC test process is to test as many of the device die or packaged parts as possible in parallel (i.e. sites) during wafer sort and final test in order to increase test time efficiency and lower overall test costs. The constraints that typically restrict how many test sites can be used at any given time are the design I/O and capac... » read more

Building Secure Software At Enterprise Scale
By Synopsys - 12 Apr, 2017 - Comments: 0

The cost of finding and remediating a software defect reduces dramatically the earlier it is found in the development life cycle. This is not new news. What is new news is an approach that builds security into the development process in a way that is easy for developers to adopt, without slowing down their workflow. Download the paper to learn how you can: Prevent common bugs and flaw... » read more

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