tag: Texas Instruments

Experts At The Table: Improving Yield
By Ed Sperling - 27 Oct, 2011 - Comments: 0

y Ed Sperling Semiconductor Manufacturing & Design sat down to discuss yield issues with Sesh Ramaswami, senior director of strategy at Applied Materials; Luigi Capodieci, R&D fellow at GlobalFoundries; Kimon Michaels, vice president and DFM director at PDF Solutions; Mike Smayling, senior vice president at Tela Innovations; and Mark Mason, director of data integration at Texas Instrum... » read more

Collaboration Grows
By Ed Sperling - 20 Oct, 2011 - Comments: 0

By Ed Sperling A series of recent announcements by the Big Three EDA vendors and their well-known partners from across the disaggregated SoC ecosystem is lending new credence to the impact of collaboration. While IDMs such as Apple, Intel, Samsung and IBM continue to blaze their own trail, developing in-house tools, methodologies, processes and chips, fabless companies working with foundrie... » read more

Virtual Prototyping Takes Off
By Ed Sperling - 30 Jun, 2011 - Comments: 0

By Ann Steffora Mutschler Skyrocketing software development costs, which for years have been “somebody else’s problem,” are now firmly part of the SoC development teams list of headaches. That has made virtual prototyping far more popular, particularly at 40nm and beyond, where engineers are looking at this approach as a way of managing complexity, doing architectural exploration and eve... » read more

IP Subsystems Are Nothing New
By Kurt Shuler - 28 Apr, 2011 - Comments: 0

By Kurt Shuler I’ve been hearing the term “IP subsystem” lately, and it seems to be the latest newfangled buzz word in the SoC semiconductor and IP industry, second only to “virtualization.” Much of the context for this growing interest in IP subsystems has been inspired from the work of Rich Wawrzyniak in his Semico Research report, “IP Subsystems: The Next IP Market Paradigm - Oc... » read more

Behind The Analog Frenzy
By Ed Sperling - 08 Apr, 2011 - Comments: 0

Analog is suddenly very hot again, and much of it appears to be due to the promise of 2.5D and 3D stacking. Texas Instruments pulled out its checkbook to pay $6.5 billion for National Semiconductor, and Microsemi has offered $28 million for AML Communications, which makes low-noise and high-power microwave amplifiers. So what’s behind these move? In TI’s case, there appears to be a re... » read more

Gene’s Law Meets EDA
By Ed Sperling - 17 Mar, 2011 - Comments: 0

By Pallab Chatterjee What will be the next major improvement that will cut power levels by an order of magnitude? That question was the basis of a roundtable discussion at the recent ISSC conference. Current technology provides incremental improvements each year, but the next generation of electronic systems will require dramatic changes and innovation. This premise is based on Gene’s Law... » read more

Qualcomm Shies Away From High-k At 28nm
By Ed Sperling - 16 Dec, 2010 - Comments: 0

By David Lammers Qualcomm CDMA Technologies said it will not use a high-k/metal gate (HKMG) process for most of the chips it makes at the 28 nm node, sticking with a poly/SiON gate stack. The company described the rationale behind the strategy, which because of Qualcomm’s size will have a major impact on the foundry business, at the 2010 International Electron Devices Meeting (IEDM) held in ... » read more

Reducing Bottlenecks
By Ann Mutschler - 18 Nov, 2010 - Comments: 0

By Ann Steffora Mutschler For the first time ever, China recently earned fastest supercomputer bragging rights with its Tianhe-1A supercomputer, which can perform 2.57 quadrillion computing operations per second. The machine has been successfully used to survey mines, forecast weather and design high-end machinery. While it has caused concern, it is important to note that the Tianhe-1A use... » read more

The Trouble With Low-Power Verification
By Ed Sperling - 04 Nov, 2010 - Comments: 0

By Ed Sperling If verification accounts for 70% of the non-recurring engineering expenses in a design, what percentage does verifying a low-power design actually consume? Answer: No one knows for sure. The reason has more to do with insufficient data than tools, processes or flows. That’s also the reason that power models have never been created for more than a single design. “Power... » read more

Moving To Open-Source Software
By Ann Mutschler - 23 Sep, 2010 - Comments: 0

By Ann Steffora Mutschler With the typical cost of software accounting for 40% to 60% of an SoC, semiconductor OEMs are under more pressure than ever to meet margins. As a result, they are drawing on their ecosystem partners to provide a more complete foundation including hardware, software, FPGA prototypes, verification IP and virtual models, as well as an increasing demand for open source so... » read more

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