tag: Tohoku University

Manufacturing Bits: June 23
By Mark LaPedus - 23 Jun, 2020 - Comments: 0

Fan-out gas sensors At the recent IEEE Electronic Components and Technology Conference (ECTC), the University of California at Los Angeles (UCLA) and the Indian Institute of Science presented a paper on the development of a wearable MEMS gas sensor device based on a flexible wafer-level fan-out packaging technology. Researchers have demonstrated a gas sensor device or a personal environment... » read more

The Next Technology Frontier In MEMS Gyroscopes
By Hideyuki Maekoba - 24 Feb, 2020 - Comments: 0

In MEMS technology development, it is always exciting to see the next technology frontier, the border of the known and the unknown. Talent and hard work (along with ingenuity) can move this frontier and enrich all of us. We respect the efforts of MEMS innovators, who have developed original and creative ideas by building upon past knowledge and wisdom and have integrated this knowledge across m... » read more

Building An MRAM Array
By Katherine Derbyshire - 17 Oct, 2019 - Comments: 2

MRAM is gaining traction in a variety of designs as a middle-level type of memory, but there are reasons why it took so long to bring this memory to market. A typical magnetoresistive RAM architecture is based on CoFeB magnetic layers, with an MgO tunneling barrier. The reference layer should have zero net magnetization to make sure that it doesn’t influence the orientation of the free lay... » read more

Power/Performance Bits: Oct. 15
By Jesse Allen - 15 Oct, 2019 - Comments: 0

Probabilistic computing Researchers at Purdue University and Tohoku University built a hardware demonstration of a probabilistic computer utilizing p-bits to perform quantum computer-like calculations. The team says probabilistic computing could bridge the gap between classical and quantum computing and more efficiently solve problems in areas such as drug research, encryption and cybersecurit... » read more

Power/Performance Bits: Jan. 22
By Jesse Allen - 22 Jan, 2019 - Comments: 0

Efficient neural net training Researchers from the University of California San Diego and Adesto Technologies teamed up to improve neural network training efficiency with new hardware and algorithms that allow computation to be performed in memory. The team used an energy-efficient spiking neural network for implementing unsupervised learning in hardware. Spiking neural networks more closel... » read more

Power/Performance Bits: Feb. 6
By Jesse Allen - 06 Feb, 2018 - Comments: 0

Recycling cathodes Nanoengineers at the University of California San Diego developed an energy-efficient recycling process that restores used cathodes from spent lithium ion batteries. The process involves harvesting the degraded cathode particles from a used battery and then boiling and heat treating them. In new batteries built with the cathodes, charge storage capacity, charging time and ba... » read more

Power/Performance Bits: March 14
By Jesse Allen - 14 Mar, 2017 - Comments: 0

Magnetic storage on one atom Scientists at IBM Research created a single-atom magnet and were able to store one bit of data on it, making it the world's smallest magnetic storage device. Using electrical current, the researchers showed that two magnetic atoms could be written and read independently even when they were separated by just one nanometer. This tight spacing could, the team hop... » read more

Managing Parasitics For Transistor Performance
By Katherine Derbyshire - 30 Jan, 2017 - Comments: 3

The basic equations describing transistor behavior rely on parameters like channel doping, the capacitance of the gate oxide, and the resistance between the source and drain and the channel. And for most of the IC industry's history, these have been sufficient. “Parasitic” or “external” resistances and capacitances from structures outside the transistor have been small enough to discoun... » read more

Power/Performance Bits: May 31
By Jesse Allen - 31 May, 2016 - Comments: 0

Solar thermophotovoltaics A team of MIT researchers demonstrated a device based on a method that enables solar cells to break through a theoretically predicted ceiling on how much sunlight they can convert into electricity. Since 1961 it has been known that there is an absolute theoretical limit, called the Shockley-Queisser Limit, to how efficient traditional solar cells can be in their ... » read more

Power/Performance Bits: May 24
By Jesse Allen - 24 May, 2016 - Comments: 0

Reducing MRAM chip area Researchers from Tohoku University developed a technology to stack magnetic tunnel junctions (MTJ) directly on the via without causing deterioration to its electric/magnetic characteristics. The team focused on reducing the memory cell area of spin-transfer torque magnetic random access memory (STT-MRAM) in order to lower manufacturing costs, making them more compe... » read more

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