Chip Industry Technical Paper Roundup: May 28


New technical papers added to Semiconductor Engineering’s library this week. [table id=229 /] More ReadingTechnical Paper Library home » read more

Scheduling Multi-Model AI Workloads On Heterogeneous MCM Accelerators (UC Irvine)


A technical paper titled “SCAR: Scheduling Multi-Model AI Workloads on Heterogeneous Multi-Chiplet Module Accelerators” was published by researchers at University of California Irvine. Abstract: "Emerging multi-model workloads with heavy models like recent large language models significantly increased the compute and memory demands on hardware. To address such increasing demands, designin... » read more

Chip Industry Technical Paper Roundup: Feb. 19


New technical papers added to Semiconductor Engineering’s library this week. [table id=199 /] More ReadingTechnical Paper Library home » read more

A Method To Transform Everyday Materials Into Conductors For Use In Quantum Computers


A technical paper titled “Controllable strain-driven topological phase transition and dominant surface-state transport in HfTe5” was published by researchers at University of California Irvine, Los Alamos National Laboratory, and University of Tennessee. Abstract: "The fine-tuning of topologically protected states in quantum materials holds great promise for novel electronic devices. Howe... » read more

Chip Industry Technical Paper Roundup: Jan. 16


New technical papers added to Semiconductor Engineering’s library this week. [table id=188 /] More ReadingTechnical Paper Library home » read more

Chiplet Heterogeneity And Advanced Scheduling With Pipelining


A technical paper titled “Inter-Layer Scheduling Space Exploration for Multi-model Inference on Heterogeneous Chiplets” was published by researchers at University of California Irvine. Abstract: "To address increasing compute demand from recent multi-model workloads with heavy models like large language models, we propose to deploy heterogeneous chiplet-based multi-chip module (MCM)-based... » read more

Designing Low Power Radar Processors


A technical paper titled “Ellora: Exploring Low-Power OFDM-based Radar Processors using Approximate Computing” was published by researchers at University of California Irvine, University of Wisconsin-Madison, and TCS Research. Abstract: "In recent times, orthogonal frequency-division multiplexing (OFDM)-based radar has gained wide acceptance given its applicability in joint radar-communic... » read more

Chip Industry’s Technical Paper Roundup: October 24


New technical papers added to Semiconductor Engineering’s library this week. [table id=157 /] More Reading Technical Paper Library home » read more

Scalable And Compact Multi-Bit CAM Designs Using FeFETs


A technical paper titled “SEE-MCAM: Scalable Multi-bit FeFET Content Addressable Memories for Energy Efficient Associative Search” was published by researchers at Zhejiang University, China, Georgia Institute of Technology, University of California Irvine, Rochester Institute of Technology, University of Notre Dame, and Laboratory of Collaborative Sensing and Autonomous Unmanned Systems of ... » read more

Chip Industry’s Technical Paper Roundup: October 3


New technical papers recently added to Semiconductor Engineering’s library: [table id=150 /] Related Reading Technical Paper Library home » read more

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