Chip Industry Technical Paper Roundup: Nov. 11


New technical papers recently added to Semiconductor Engineering’s library: [table id=381 /] More Reading Technical Paper Library » read more

New Class Of Materials With Increased Band Gap (U. of Minnesota, Caltech)


A new technical paper titled "Deep-ultraviolet transparent conducting SrSnO3 via heterostructure design" was published by researchers at University of Minnesota–Twin Cities and Caltech. The researchers "looked at creating a new class of materials with increased “band gap,” enhancing both transparency and conductivity. The new material is a transparent conducting oxide, created with a s... » read more

Research Bits: Sept. 24


Modeling negative capacitance Researchers from Lawrence Berkeley National Laboratory developed an open-source 3D simulation framework capable of modeling the atomistic origins of negative capacitance in ferroelectric thin films at the device level. When a material has negative capacitance, it can store a greater amount of electrical charge at lower voltages. The team believes the FerroX fra... » read more

Technical Paper Roundup: Sept 11


New technical papers added to Semiconductor Engineering’s library this week. [table id=136 /] (more…) » read more

Research Bits: July 18


Miniaturized ferroelectric FETs Researchers from the University of Pennsylvania, Hanyang University, King Abdulaziz University, King Abdullah University of Science and Technology, and University of Tokyo proposed a new ferroelectric FET (FE-FET) design with improved performance for both computing and memory. The transistor layers the two-dimensional semiconductor molybdenum disulfide (MoS2)... » read more

Research Bits: May 10


Growing 2D TMDs on chips Researchers from Massachusetts Institute of Technology (MIT), Oak Ridge National Laboratory, and Ericsson Research found a way to “grow” layers of 2D transition metal dichalcogenide (TMD) materials directly on top of a fully fabricated silicon chip, a technique they say could enable denser integrations. The researchers focused on molybdenum disulfide, which is f... » read more

Chip Industry’s Technical Paper Roundup: Jan. 17


New technical papers added to Semiconductor Engineering’s library. [table id=74 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us posting li... » read more

New Technique For Making Thin Films of Perovskite Oxide Semiconductors


A technical paper titled "Freestanding epitaxial SrTiO3  nanomembranes via remote epitaxy using hybrid molecular beam epitaxy" was published by researchers at University of Minnesota Twin Cities, Pacific Northwest National Laboratory, and University of Wisconsin–Madison. The researchers developed a new technique for making thin films of perovskite oxide semiconductors.  The development c... » read more

Chip Industry’s Technical Paper Roundup: Jan 3


New technical papers added to Semiconductor Engineering’s library this week. [table id=72 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us ... » read more

MTJ-based Circuits Provide Low-Cost, Energy Efficient Solution For Future Hardware Implementation in SC Algorithms


A review paper titled "Review of Magnetic Tunnel Junctions for Stochastic Computing" was published by researchers at University of Minnesota Twin Cities. Funding agencies include Semiconductor Research Corporation (SRC), CAPSL, NIST, DARPA and others. Abstract: "Modern computing schemes require large circuit areas and large energy consumption for neuromorphic computing applications, such as... » read more

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