tag: University of Oxford

Chip Industry Week In Review
By The SE Staff - 22 Nov, 2023 - Comments: 0

By Jesse Allen, Susan Rambo, and Liz Allan The U.S. government will invest about $3 billion for the National Advanced Packaging Manufacturing Program (NAPMP), including an advanced packaging piloting facility to help U.S. manufacturers adopt new technology and workforce training programs. It also will provide funding for projects concentrating on materials and substrates; equipment, tools, ... » read more

Research Bits: October 24
By Jesse Allen - 24 Oct, 2023 - Comments: 0

Photonic-electronic hardware processes 3D data Researchers from the University of Oxford, University of Muenster, University of Heidelberg, and University of Exeter are developing integrated photonic-electronic hardware capable of processing three-dimensional data, which the team claims boosts data processing parallelism for AI tasks. The researchers added an extra parallel dimension to the... » read more

Chip Industry Week In Review
By The SE Staff - 13 Oct, 2023 - Comments: 0

By Liz Allan, Jesse Allen, and Karen Heyman. Canon uncorked a nanoimprint lithography system, which the company said will be useful down to about the 5nm node. Unlike traditional lithography equipment, which projects a pattern onto a resist, nanoimprint directly transfers images onto substrates using a master stamp patterned by an e-beam system. The technology has a number of limitations and... » read more

Chip Industry Week In Review
By The SE Staff - 22 Sep, 2023 - Comments: 0

By Jesse Allen, Karen Heyman, and Liz Allan The U.S. Department of Defense (DOD) announced $238 million in awards toward establishing eight regional innovation hubs under the CHIPS and Science Act. The hubs aim to accelerate hardware prototyping and "lab-to-fab" transition of semiconductor technologies for secure edge/IoT, 5G/6G, AI hardware, quantum technology, electromagnetic warfare, and ... » read more

Chip Industry’s Technical Paper Roundup: May 8
By Linda Christensen - 08 May, 2023 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=102 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us... » read more

Attestation Scheme Monitoring The Prover Using Hardware Security Module Connected To Its System Bus (Oxford)
By Technical Paper Link - 05 May, 2023 - Comments: 0

A technical paper titled "Hardware-assisted remote attestation design for critical embedded systems" was published by researchers at University of Oxford. Abstract (excerpt) "To reveal attack scenarios exploiting the memory regions and time windows left unattested, we propose an attestation scheme that can continuously monitor both static and dynamic memory regions with better spatial and t... » read more

Chip Industry’s Technical Paper Roundup: Dec. 5
By Linda Christensen - 05 Dec, 2022 - Comments: 0

New technical papers added to Semiconductor Engineering’s library this week. [table id=67 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for u... » read more

Research Bits: Dec. 5
By Jesse Allen - 05 Dec, 2022 - Comments: 0

Protonic programmable resistors for AI Researchers from the Massachusetts Institute of Technology (MIT) developed an analog deep learning processor based on protonic programmable resistors arranged in an array. In the processor, increasing and decreasing the electrical conductance of protonic resistors enables analog machine learning. The conductance is controlled by the movement of protons... » read more

Capability Hardware Enhanced RISC Instructions (CHERI) For Verification, With Better Memory Safety (Oxford)
By Technical Paper Link - 30 Nov, 2022 - Comments: 0

A technical paper titled "A Formal CHERI-C Semantics for Verification" was published by researchers at University of Oxford. Abstract: "CHERI-C extends the C programming language by adding hardware capabilities, ensuring a certain degree of memory safety while remaining efficient. Capabilities can also be employed for higher-level security measures, such as software compartmentalization, ... » read more

Research Bits: Oct. 25
By Jesse Allen - 25 Oct, 2022 - Comments: 0

Polarization for photonic processor Researchers from the University of Oxford and University of Exeter developed a photonic processor that uses multiple polarization channels, increasing information density. "We all know that the advantage of photonics over electronics is that light is faster and more functional over large bandwidths. So, our aim was to fully harness such advantages of phot... » read more

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