Week In Review: Manufacturing, Test


Bosch completed its acquisition of TSI Semiconductors to expand its SiC chips business, reports Reuters. In April, Bosch announced plans to invest $1.5 billion in the Roseville, California, foundry to convert TSI’s manufacturing facilities into state-of-the-art processes, with the first SiC chips due out in 2026. Bosch CEO Stefan Hartung said the full expansion "depends on the support of the... » read more

Chip Industry’s Technical Paper Roundup: August 22


New technical papers added to Semiconductor Engineering’s library this week. [table id=129 /]   More Reading Technical Paper Library home » read more

Week In Review: Semiconductor Manufacturing, Test


Intel dropped out of a $5.4 billion deal to purchase Tower Semiconductor in Israel. Intel cited the inability to obtain regulatory approval in a timely manner as the reason for ending the deal signed in February. Intel will pay a $353 million termination fee to Tower. The silicon wafer supply has moved back into positive territory for 2023 thanks to a 7% decline in wafer shipments combined w... » read more

High-Performance P-Type FET Arrays With Single-Crystal 2D Semiconductors And Fermi-Level-Tuned vdW Contact Electrodes


A technical paper titled “Fabrication of p-type 2D single-crystalline transistor arrays with Fermi-level-tuned van der Waals semimetal electrodes” was published by researchers at Ulsan National Institute of Science and Technology (UNIST), University of Pennsylvania, Institute for Basic Science (IBS), Sogang University, and Changwon National University. Abstract: "High-performance p-type t... » read more

Chip Industry Technical Paper Roundup: August 15


New technical papers added to Semiconductor Engineering’s library this week. [table id=128 /] More Reading Technical Paper Library home » read more

New & Faster Single-Crystalline Oxide Thin Films (Max Planck, Cambridge, U of Penn.)


A technical paper titled “Li iontronics in single-crystalline T-Nb2O5 thin films with vertical ionic transport channels” was published by researchers at Max Planck Institute of Microstructure Physics, University of Cambridge, University of Pennsylvania, Gumi Electronics and Information Technology Research Institute, Northwestern University, and ALBA Synchrotron Light Source. Abstract: "Th... » read more

Research Bits: July 18


Miniaturized ferroelectric FETs Researchers from the University of Pennsylvania, Hanyang University, King Abdulaziz University, King Abdullah University of Science and Technology, and University of Tokyo proposed a new ferroelectric FET (FE-FET) design with improved performance for both computing and memory. The transistor layers the two-dimensional semiconductor molybdenum disulfide (MoS2)... » read more

Research Bits: Jan. 24


Transistor-free compute-in-memory Researchers from the University of Pennsylvania, Sandia National Laboratories, and Brookhaven National Laboratory propose a transistor-free compute-in-memory (CIM) architecture to overcome memory bottlenecks and reduce power consumption in AI workloads. "Even when used in a compute-in-memory architecture, transistors compromise the access time of data," sai... » read more

Multi-Wavelength, Multimode Communication Scheme For On-Chip and Chip-to-Chip Interconnects


A technical paper titled "Multi-dimensional data transmission using inverse-designed silicon photonics and microcombs" was published by researchers at Stanford, Harvard, University of Central Florida, NIST, and others. "Here we demonstrate an integrated multi-dimensional communication scheme that combines wavelength- and mode- multiplexing on a silicon photonic circuit. Using foundry-compati... » read more

Chip Industry’s Technical Paper Roundup: Oct 18


New technical papers added to Semiconductor Engineering’s library this week. [table id=57 /] » read more

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