Co-Simulation Framework for Parallel DNN Execution on Chiplet-Based Systems (UW–Madison, Washington State)


A new technical paper titled "CHIPSIM: A Co-Simulation Framework for Deep Learning on Chiplet-Based Systems" was published by researchers at University of Wisconsin–Madison and Washington State University. Abstract "Due to reduced manufacturing yields, traditional monolithic chips cannot keep up with the compute, memory, and communication demands of data-intensive applications, such as ra... » read more

Chip Industry Week in Review


The Open Compute Project (OCP) Summit kicked off this week in San Jose, dominated by open standards, massive scaling of AI infrastructure, chiplet architectures, and energy-efficiency. Among the highlights: An initiative to standardize data center infrastructure and advance Ethernet for AI. New contributions to OCP's Open Chiplet Economy ecosystem, including Arm's new Foundation Chiplet... » read more

Chip Industry Week in Review


Cadence plans to buy Hexagon AB's design and engineering business to accelerate expansion in physical AI and system design and analysis. Cadence will pay ~US$3.1 billion in cash and issue stock, with the deal expected to close in early 2026. PWC issued a 104-page in-depth analysis of semiconductor technology and markets, highlighting a broad swath of changes: $1T in annual revenue by 2030, ... » read more

Chip Industry Technical Paper Roundup: August 26


New technical papers recently added to Semiconductor Engineering’s library: [table id=467 /] Find more semiconductor research papers here. » read more

Thermally-Aware, Multi-Objective Scheduling Framework for DL Workloads on Heterogeneous Multi-Chiplet PIM Architectures (UW–Madison, Washington State)


A new technical paper titled "THERMOS: Thermally-Aware Multi-Objective Scheduling of AI Workloads on Heterogeneous Multi-Chiplet PIM Architectures" was published by researchers at the University of Wisconsin–Madison and Washington State University. Abstract "Chiplet-based integration enables large-scale systems that combine diverse technologies, enabling higher yield, lower costs, and sca... » read more

Chip Industry Technical Paper Roundup: July 22


New technical papers recently added to Semiconductor Engineering’s library: [table id=456 /] Find more semiconductor research papers here.   » read more

Photonic SRAM Facilitating Electro-Optic Data Storage For Ultra-Fast IMC (UW-Madison, USC)


A new technical paper titled "X-pSRAM: A Photonic SRAM with Embedded XOR Logic for Ultra-Fast In-Memory Computing" was published by researchers at University of Wisconsin–Madison and USC. Abstract "Traditional von Neumann architectures suffer from fundamental bottlenecks due to continuous data movement between memory and processing units, a challenge that worsens with technology scaling ... » read more

Chip Industry Technical Paper Roundup: Apr. 7


New technical papers recently added to Semiconductor Engineering’s library: [table id=419 /] Find more semiconductor research papers here. » read more

Photonic-SRAM Bitcell for High-Speed On-Chip Photonic Memory and Compute Systems (UW, USC, GF)


A new technical paper titled "Design of Energy-Efficient Cross-coupled Differential Photonic-SRAM (pSRAM) Bitcell for High-Speed On-Chip Photonic Memory and Compute Systems" was published by researchers at University of Wisconsin–Madison, USC and GlobalFoundries. Abstract "In this work, we propose a novel differential photonic static random access memory (pSRAM) bitcell design using fabri... » read more

High-Temperature Nonreciprocal Thermal Radiative Properties From Semiconductors (U. Houston, Caltech, UW-Madison)


A new technical paper titled "High-Temperature Strong Nonreciprocal Thermal Radiation from Semiconductors" was published by University of Houston, California Institute of Technology and University of Wisconsin-Madison. Abstract "Nonreciprocal thermal emitters that break the conventional Kirchhoff's law allow independent control of emissivity and absorptivity and promise exciting new funct... » read more

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