Blog Review: Feb. 8

By Jesse Allen - 08 Feb, 2023 - Comments: 0

Cadence's Sanjeet Kumar points to key changes and optimizations that are done for USB3 Gen T compared to USB3 Gen X tunneling in order to minimize tunnel overhead and maximize USB3 throughput. Siemens EDA's Harry Foster considers the effectiveness of IC and ASIC verification by looking at schedule overruns, number of required spins, and classification of functional bugs. Synopsys' Chris C... » read more

Chip Industry’s Earnings Roundup

By Linda Christensen - 06 Feb, 2023 - Comments: 0

Editor's Note: Updated throughout February 2023 for additional earnings releases. Many companies reported revenue growth in the most recent quarter, but the latest round of chip industry earnings releases reflected some major themes: Demand for consumer electronics softened due to inflation, rising interest rates, and post-pandemic market saturation, creating a slump in the memory chip ... » read more

Blog Review: Dec. 14

By Jesse Allen - 14 Dec, 2022 - Comments: 0

Siemens EDA's Harry Foster checks out design and verification language adoption trends in FPGA projects, including testbench methodologies and assertion languages. Cadence's Veena Parthan finds that giving electric vehicle batteries a second life as energy storage devices can extend their useful life by 5 to 8 years, but a lack of standardization in EV batteries poses challenges. Synopsys... » read more

Chip Industry Earnings: A Mixed Bag

By Linda Christensen - 28 Oct, 2022 - Comments: 0

Editor's Note: Updated the week of Oct. 31 and Nov. 7 for additional earnings releases. Although most companies reported revenue growth, this latest round of chip industry earnings releases reflected a few major themes: Lower future quarter guidance to varying degrees, due to the recent U.S. export restrictions related to China; Negative impact of the inflationary environment on corn... » read more

Blog Review: Oct. 5

By Jesse Allen - 05 Oct, 2022 - Comments: 0

Arm's Andrew Pickard chats with Georgia Tech's Azad Naeemi and Da Eun Shim about an effort to evaluate the benefit of new interconnect materials and wire geometry and determine their impacts at the microprocessor level. Synopsys' Shekhar Kapoor shares highlights from a recent panel exploring the promises, challenges, and realities of 3D IC technology, including the potential of 3D nanosystem... » read more

DNA Edges Forward As Data Storage Option

By Bernadette Tansey - 28 Sep, 2022 - Comments: 0

At technology conferences back in 2015, scientist David Markowitz raised the idea that DNA could be adapted as a data storage material. The audience response wasn’t all he had hoped for. “They would laugh me off the podium,” Markowitz recalls, but without rancor. Facing skepticism comes with his job at IARPA, the research arm of the U.S. intelligence community. The agency anticipates f... » read more

Blog Review: Sept. 28

By Jesse Allen - 28 Sep, 2022 - Comments: 0

Cadence's Paul McLellan shares more highlights from the recent Hot Chips, including some very large chips and accelerators for AI and deep learning, new networks and switches, and mobile and edge processors. Synopsys' Marc Serughetti considers the different use cases for digital twins in automotive and how they can help determine the impact of software on verification, test, and validation a... » read more

Blog Review: Aug. 24

By Jesse Allen - 24 Aug, 2022 - Comments: 0

Synopsys' Manuel Mota presents an overview of some of the newest multi-chip module packaging types and their advantages and disadvantages for different kinds of applications, as well as the importance of die-to-die interfaces. Cadence's Steve Brown finds that innovative products require that electronics be analyzed in the context of the environment in which they run, making mechanical and el... » read more

Blog Review: Aug. 3

By Jesse Allen - 03 Aug, 2022 - Comments: 0

Siemens' Patrick Hope explains the growing importance of choosing the right laminate for PCB designs and how to read a material datasheet to compare important electrical, thermal, and mechanical properties. Synopsys' Yankin Tanurhan argues that as the number of sensors being integrated in automotive systems increases to enable new ADAS and autonomy capabilities, building security and quality... » read more

Week In Review: Design, Low Power

By Jesse Allen - 13 May, 2022 - Comments: 0

Tools & IP MIPS announced its first products based on the RISC-V ISA. The eVocore IP cores are designed to provide a flexible foundation for heterogeneous compute, supporting combinations of eVocore processors as well as other accelerators, with a Coherence Manager that maintains L2 cache and system-level coherency between all cores, main memory, and I/O devices. They target high-performan... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

New AI Processors Architectures Balance Speed With Efficiency

Hot Chips 24: Large language models ratchet up pressure for sustainable computing and heterogeneous integration; data management becomes key differentiator.