Current Characterization Of Various Cu RDL Designs In Wafer Level Packages (WLP)

By JeongMin Ju - 15 Aug, 2024 - Comments: 0

Copper (Cu) redistribution layer (RDL) technology is used to interconnect chips in various high current Wafer Level Packaging (WLP) applications. Typically, Cu RDLs with thicknesses of 5-9 µm and widths of 5-20 µm are used for high current sourcing. In this case, the temperature of the Cu RDL metal line increases due to the Joule heat generated when current passes through the metal line. If a... » read more

System-In-Package Thrives In The Shadows

By Mark LaPedus - 16 Sep, 2021 - Comments: 0

IC packaging continues to play a big role in the development of new electronic products, particularly with system-in-package (SiP), a successful approach that continues to gain momentum — but mostly under the radar because it adds a competitive edge. With a SiP, several chips and other components are integrated into a package, enabling it to function as an electronic system or sub-system. ... » read more

Fan-Out Packaging Options Grow

By Mark LaPedus - 17 Jun, 2021 - Comments: 0

Chipmakers, OSATs and R&D organizations are developing the next wave of fan-out packages for a range of applications, but sorting out the new options and finding the right solution is proving to be a challenge. Fan-out is a way to assemble one or more dies in an advanced package, enabling chips with better performance and more I/Os for applications like computing, IoT, networking and sma... » read more

Chip Board Interaction Analysis Of 22nm FD-SOI Technology In WLP

By Amkor - 17 Mar, 2021 - Comments: 0

Recently, Wafer Level Packaging (WLP) has been in high demand, especially in mobile device applications as a path to enable miniaturization while maintaining good electrical performance. The relatively inexpensive package cost and simplified supply chain are encouraging other industries to adapt WLP capabilities for radio frequency (RF), communications/sensing (mmWave) and automotive applicatio... » read more

Shortages, Challenges Engulf Packaging Supply Chain

By Mark LaPedus - 18 Feb, 2021 - Comments: 0

A surge in demand for chips is impacting the IC packaging supply chain, causing shortages of select manufacturing capacity, various package types, key components, and equipment. Spot shortages in packaging surfaced in late 2020 and have since spread to other sectors. There are now a variety of choke points in the supply chain. Wirebond and flip-chip capacity will remain tight throughout 2021... » read more

Understanding Advanced Packaging Technologies And Their Impact On The Next Generation Of Electronics

By Sandy Wen - 28 Aug, 2020 - Comments: 2

Chip packaging has expanded from its conventional definition of providing protection and I/O for a discrete chip to encompassing a growing number of schemes for interconnecting multiple types of chips. Advanced packaging has become integral to embedding increased functionality into a variety of electronics, such as cellular phones and self-driving vehicles, by supporting high device density in ... » read more

The Race To Much More Advanced Packaging

By Mark LaPedus - 23 Jul, 2020 - Comments: 2

Momentum is building for copper hybrid bonding, a technology that could pave the way toward next-generation 2.5D and 3D packages. Foundries, equipment vendors, R&D organizations and others are developing copper hybrid bonding, which is a process that stacks and bonds dies using copper-to-copper interconnects in advanced packages. Still in R&D, hybrid bonding for packaging provides mo... » read more

The Next Advanced Packages

By Mark LaPedus - 18 Jun, 2020 - Comments: 4

Packaging houses are readying their next-generation advanced IC packages, paving the way toward new and innovative system-level chip designs. These packages include new versions of 2.5D/3D technologies, chiplets, fan-out and even wafer-scale packaging. A given package type may include several variations. For example, vendors are developing new fan-out packages using wafers and panels. One is... » read more

Multifunctional Materials Enable Single-Layer Temporary Bonding And Debonding

By Luke Prenger - 23 May, 2019 - Comments: 0

Many new wafer-level packaging (WLP) technologies involve the processing of thin wafers that must be mechanically supported during the manufacturing flow. These technologies include fan-out wafer-level packaging (FOWLP), fan-in wafer-level chip-scale packaging (FI-WLCSP), 3-D FOWLP, 2.5-D integration with interposer technology, and true 3-D IC integration using through-silicon via (TSV) interco... » read more

Inspecting IC Packages Using Die Sorters

By Mark LaPedus - 18 Apr, 2019 - Comments: 0

The shift toward more complex IC packages requires more advanced inspection systems in the production flow to capture unwanted defects in products. This includes traditional optical inspection tools in the in-line production flow, but it also now requires new die sorting equipment with advanced inspection capabilities. Die sorters are not the kind of equipment that typically attracts attenti... » read more

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Knowledge Centers
Entities, people and technologies explored

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3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

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Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

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Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

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The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

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Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

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tag: WLP