Chip Industry Technical Paper Roundup: Sept 23


New technical papers recently added to Semiconductor Engineering’s library: [table id=478 /] Find more semiconductor research papers here. » read more

Undervolting Attack That Exploits The Vulnerability Of Chips During Brownout Conditions (Worcester Polytechnic, RUB)


A new technical paper titled "Chypnosis: Stealthy Secret Extraction using Undervolting-based Static Side-channel Attacks" was published by researcher at Worcester Polytechnic Institute and Ruhr University Bochum. Abstract: "Static side-channel analysis attacks, which rely on a stopped clock to extract sensitive information, pose a growing threat to embedded systems' security. To protect a... » read more

Chip Industry Week in Review


The U.S. Commerce Department is tightening controls on EDA software sold to China by imposing additional license requirements. EDA companies are assessing the impact. Details on how broad the restrictions will be are still pending. The U.S. Federal Trade Commission (FTC) will require Synopsys and Ansys to divest key software assets — including optical, photonic, and RTL power analysis tool... » read more

Chip Industry Technical Paper Roundup: May 20


New technical papers recently added to Semiconductor Engineering’s library: [table id=432 /] Find more semiconductor research papers here. » read more

Cache Side-Channel Attacks On LLMs (MITRE, WPI)


A new technical paper titled "Spill The Beans: Exploiting CPU Cache Side-Channels to Leak Tokens from Large Language Models" was published by researchers at MITRE and Worcester Polytechnic Institute. Abstract "Side-channel attacks on shared hardware resources increasingly threaten confidentiality, especially with the rise of Large Language Models (LLMs). In this work, we introduce Spill The... » read more

Chip Industry Technical Paper Roundup: May 6


New technical papers recently added to Semiconductor Engineering’s library: [table id=427 /] Find more semiconductor research papers here.   » read more

On-Chiplet Framework for Verifying Physical Security and Integrity of Adjacent Chiplets


A new technical paper titled "ChipletQuake: On-die Digital Impedance Sensing for Chiplet and Interposer Verification" was published by researchers at Worcester Polytechnic Institute. Abstract "The increasing complexity and cost of manufacturing monolithic chips have driven the semiconductor industry toward chiplet-based designs, where smaller and modular chiplets are integrated onto a singl... » read more

Chip Industry Technical Paper Roundup: Mar. 25


New technical papers recently added to Semiconductor Engineering’s library: [table id=415 /] Find more semiconductor research papers here. » read more

Chip Industry Week In Review


Semiconductor industry energy consumption grew 125% between 2015 and 2023, while direct greenhouse gas emissions rose 23% in the same period, according to the Europe think tank Interface, which analyzed corporate social responsibility reports from 28 global chip manufacturers. CSIS' new report "Understanding U.S. Allies’ Current Legal Authority to Implement AI and Semiconductor Export Cont... » read more

Chip Industry Week In Review


ASML and imec signed a five-year strategic partnership to advance semiconductor innovation and sustainable technology. The collaboration will leverage ASML’s full product portfolio, including high-NA EUV, DUV immersion, and advanced metrology tools, within imec’s pilot line for sub-2nm R&D. Supported by EU and national funding, it will also drive research in silicon photonics, memory, a... » read more

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