Chiplet probing attacks; RISC-V Rowhammer; HPC QPU eval; CTFET at varying temps; KANs as alternative to MLPs; TNN inference on RISC-V edge systems; automotive chiplets.
New technical papers added to Semiconductor Engineering’s library this week.
| Technical Paper | Research Organizations |
|---|---|
| RISC-H: Rowhammer Attacks on RISC-V | ETH Zurich |
| Evaluating Vulnerability of Chiplet-Based Systems to Contactless Probing Techniques | University of Massachusetts and Worcester Polytechnic Institute |
| Chiplets on Wheels: Review Paper on Holistic Chiplet Solutions for Autonomous Vehicles | Indian Institute of Technology, Madras |
| Vertical-Stack Nanowire Structure of MOS Inverter and TFET Inverter in Low-temperature Application | National Tsing Hua University and National United University in Taiwan |
| xTern: Energy-Efficient Ternary Neural Network Inference on RISC-V-Based Edge Systems | ETH Zurich and Universita di Bologna |
| KAN: Kolmogorov-Arnold Networks | MIT, CalTech, Northeastern University and The NSF Institute for Artificial Intelligence and Fundamental Interactions |
| Calibration and Performance Evaluation of a Superconducting Quantum Processor in an HPC Center | Leibniz Supercomputing Centre, IQM Quantum Computers, and Technical University of Munich |
More Reading
Technical Paper Library home
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