The Promise Of GDDR6 And 7nm

Research Nester, a market research and consulting firm, estimates that the “global market of computer graphics may witness a remarkable growth and reach at the valuation of $215.5 billion by the end of year 2024.” Plus, it says this market is expected to grow at a significant compound annual growth rate or CAGR of 6.1% over the forecast period 2017 to 2024.

Computer graphics is just the beginning of the burgeoning markets that GDDR6 DRAM will supercharge over the near term. Industry forecasts expect GDDR6 to start ramping up this year and become the mainstream graphic memory by 2024. GDDR6 revenue is expected to be in the range of $6 to $8 billion, which foretells the increasingly vast system application usage over the next few years.

This healthy growth, fueled by the graphics market, is only the start for GDDR6. The memory bandwidth bottleneck is now affecting a broad range of high-performance applications including networking, data center, advanced driver assistance systems (ADAS), cryptocurrency mining, high-performance computing (HPC), machine learning and artificial intelligence (AI).

GDDR6 DRAM, at speeds of 16Gbps (per pin) or 512Gbps of total bandwidth per DRAM device, offers these applications a memory subsystem that is in many cases 5X faster than traditional memory solutions. As GDDR6 is being embraced by system designers in AI, ADAS and networking, it is expected to grow beyond market expectations.

In tandem with the need for high-speed memory, these advanced SoCs (System on Chip) require the maximum compute performance, highest transistor density and lowest power. To meet these requirements, the SoC are moving to the leading edge 7nm finFET process technology.

The advanced 7nm process node allows the industry to significantly push SoC performance levels required for complex algorithms used, for example in AI training/inference.

The finFET 7nm process node is expected to hand design engineers about four times higher density, 20 to 50% switching performance increase, and more than 50% less power consumption in comparison with the earlier generation nodes.

The shrinking of the 7nm finFET process node covers all aspects of the logic design, including a significant decrease in capacitor size and channel length. Armed with these new benefits, SoC and system designers have the best of all worlds to develop leading-edge SoC with maximum performance and the highest memory bandwidth all with the lowest area and power. Lower process nodes are also vital to implement high-speed SerDes technology including 32G, 56G and 112G PHYs necessary to move all this data on and off chip. In turn, these features effectively increase performance by creating faster response times for maximum system performance.