Evaluating the magnitude of parasitic resonances and electromagnetic interference in a switch-mode power supply.
Automotive incandescent bulbs have largely given way to more efficient, reliable, stylish, and even safer light emitting diodes (LEDs). LEDs turn on in a fraction of the time and are especially useful in brake lamps, where fractions of a second matter. The challenge in designing an automotive LED lamp is in satisfying government requirements for light output while also being cost effective. Another hurdle is design complexity where a switch-mode power supply (SMPS) is often required. A SMPS is more complex, expensive, and can be a source of electromagnetic interference (EMI), especially in comparison with the body control module (BCM) high-side-driver (HSD) that is typically used to turn on an incandescent bulb. Generating sufficient light output often requires a series string of LEDs. Consequently, a boost converter is often used to create the LED string compliance voltage from a car battery that can vary from 6V under start-stop and cold-crank condition to 19V.
The boost topology uses a MOSFET switch and diode, as illustrated in Figure 1, and the switch can turn on in nanoseconds. If this switch action resonates with parasitic elements on the PCB, it can cause EMI in the form of radiated and conducted emissions. One technique used to mitigate EMI in switching regulators is to slow down the input supply current and voltage transitions (di/dt and dv/dt) with a MOSFET gate resistor. But what exactly does this do and how should it be selected? There are two methods of analyzing the effect of the gate resistor. The first and more common method is to use a circuit simulator like SPICE or SIMPLIS. Another approach would be to use a 2D or 3D electromagnetic (EM) simulator like ADS to run a co-simulation with SPICE. The latter is much more complicated, but equally more comprehensive. It also requires expensive software and a user who is familiar with these tools. SPICE, on the other hand, is more commonly understood and available as freeware.
The simulation circuit diagram in Figure 1 is that of a boost converter power stage, and is used here to evaluate the impact of the gate resistance on the power stage. In this simulation, I consider the magnitude of the transient voltages, current, and turn-on power as an indicator of the potential reliability and EMI concerns; issues associated with component selection; and layout parasitics. As such, the MOSFET model and all component models should be well understood. In fact, this is where an EM simulation shines by including board parasitics and coupling mechanisms. Whichever approach you take, take the advice of Bob Pease and other prominent figures in circuit analysis who recommend that you should always know approximately what the simulation will look like if you are going to objectively consider the result. I have found Vishay and Nexperia automotive MOSFET models to be adequate for switch-mode power supply analysis.
Several years ago, while working with a Tier 1 supplier on the Ford Mustang 50th anniversary rear combination lamp (RCL) assembly, I proposed a boost into linear approach to implement the LED lamp functions, including the popular three-lamp sequential turn. Each lamp compartment had 11 red LEDs in series for a current source compliance voltage of around 25V. The engineer I worked with is now at Nexperia and was a lot of fun to work with.
I built a simulation for him in TINA SPICE and we reviewed his layout in Altium. I never met him until a few years after the Mustang was in production, a testament to virtual engineering support and something we have all been doing a lot of lately. If there is one thing to take away from this post, it’s that the secret of us getting a design right is to collaborate with someone, or a team, that you enjoy working with. Analyze it, review the layout, and test it thoroughly: something automotive OEMs generally require from their tiers!
Figure 1. Simulation using a behavioral block to create a variable gate drive i/v strength with programmable soft-start, frequency, and duty cycle.
The simulation in Figure 1 uses a behavioral block (OSC_DRV) to create a variable gate drive i/v strength with programmable soft-start, frequency, and duty cycle. The boost converter non-synchronous output stage is shown next to the OSC_DRV macro. This open-loop simulation was built in TINA to evaluate parasitic behavior, and it runs a 2.5ms simulation at 1MHz switching in about 10 seconds. I throttled back the dynamic time-step algorithm of SPICE to a maximum of 50ns to help ensure an accurate computation of the circuit matrix during MOSFET transitions. The input was set at 14V, with an output to 24V at 1A. The Vishay SQ3418EV 40V MOSFET model was used, and the result of the MOSFET dynamic input capacitance can be seen in Figure 2, where the gate signal plateau voltage duration is a function of gate resistance. Typical parasitics were added to the circuit, including a 10pF capacitance across the inductor to create an inductor self-resonant frequency (SRF) of 16MHz; select your output inductor to have a SRF at least 10x the switching frequency.
The in-line power meter PM1 measures both the switching and conduction losses of the MOSFET Q1. Notice from the waveforms in Figure 2 that the gate resistor significantly impacts the peak-to-average power dissipation. Of course, this impacts EMI, as can be seen by its effect on the Schottky diode, capacitor, and gate currents. One of the goals of the Mustang design was to eliminate the need for a Faraday shield. It is clear by looking at these waveforms that the loop currents and MOSFET dv/dt are high enough to cause EMI issues if component selection and/or layout are not done correctly. Even the gate drive loop current can be a problem in the presence of parasitic inductance, particularly when one considers the high transconductance of the FET. Any parasitic ringing on the gate can be amplified, causing big problems in the EMC chamber. Note that the internal gate resistance of the FET should also be considered. Also notice the impact the external gate resistor has on output noise–something to consider for sensitive ADAS applications, including driver monitoring systems (DMS) and radar/lidar. In a boost converter, the reverse recovery charge (Qrr) and/or junction capacitance of the output diode can be significant. Make sure you understand the parasitics of the diode and, in general, don’t oversize it as Qrr and junction capacitance increase proportional to size.
Figure 2. Result of the MOSFET dynamic input capacitance from an open-loop simulation.
In summary, the magnitude of parasitic resonances of an SMPS can be quantified in SPICE and attenuated with a gate resistor. A simple SPICE simulation has been presented to better comprehend the effects of the MOSFET gate resistor on a switching regulator’s power, which collectively with the PCB component layout can impact reliability and EMI.
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