Arteris IP buys Magillem; Arm’s new safety-focused IP; reconfigurable fabric accelerator; BSIM-Bulk updates.
Arteris IP will acquire the assets of Magillem Design Services, combining Arteris’ NoC interconnect IP with Magillem’s chip design and assembly environment. Magillem’s software products will continue to be offered separately from the Arteris interconnect IP offerings and the joined company will continue to execute on Magillem’s existing product and technology roadmaps. Substantially all Magillem team members will be joining Arteris IP, according to the companies. Terms of the deal were not disclosed, and it is expected to close in the fourth quarter 2020. Based in Paris, France, Magillem was founded in 2006.
Tools & IP
Arm unveiled a suite of new safety-focused IP.The Cortex-A78AE is a high-performance safety capable CPU targeting autonomous applications such as mobile robotics and driverless transportation. It provides 30% better performance compared to its predecessor, includes Split Lock mode to accommodate mixed ASIL requirements, and supports ISO 26262 and IEC 61508 for applications up to ASIL D / SIL 3.
The Arm Mali-G78AE GPU supports Flexible Partitioning, with up to four fully independent partitions for workload separation for safety use cases. It targets human machine interfaces and supports ASIL B / SIL 2 requirements.
The Arm Mali-C71AE ISP targets human and machine vision applications such as production line monitoring and ADAS camera systems. It supports four real time cameras, or 16 buffered cameras, delivering a 1.2 giga pixel per second throughput as well as features to achieve ASIL B / SIL 2 safety capability.
Synopsys’ DesignWare ARC EM22FS Functional Safety Processor was certified for full ISO 26262 ASIL D compliance by SGS-TÜV Saar. Integrated safety features of the processor include dual-core lockstep, error-correcting code, transient fault protection for internal registers, diagnostic error injection, and safety monitors.
Efinix launched its Reconfigurable Acceleration Platform (RAP) initiative, which provide expanded access to its Quantum reconfigurable fabric accelerator technology including availability as known good die for SIP integration, core integration with customer-defined peripheral IP, and licensable cores for inclusion in customer-specific ASIC designs.
IAR Systems released an update of its Renesas RH850 MCU-focused build tools for automotive embedded systems that supports implementation in Linux-based frameworks for automated application build and test processes. It includes the integrated static analysis tool C-STAT for code quality. The company also recently updated its IAR Embedded Workbench for Arm development toolchain to include complete coverage for the ultra-low-power Renesas RE MCU Family.
Cylynt introduced Ranger, a new piracy detection application for EDA and semiconductor software vendors (among others) that can detect the presence of illegal cracked software installations and protect end users from the potential threats posed by malware and ransomware in cracked software installations.
Deals
Picocom selected Moortec’s in-chip sensing fabric to improve power consumption, performance and reliability for its SoC for 5G small cell infrastructure. Picocom cited accurate process, voltage, and temperature monitoring that enables performance monitoring over the life of the product, which could be over a decade.
Compal Electronics adopted Ansys’ automated simulation and analysis solutions for its development of 5G-enabled laptops. In developing 5G millimeter wave antenna modules, Compal cited faster production of analysis reports for international compliance requirements and noted it has received FCC certification. The company also uses Ansys’ flagship HFSS 3D electromagnetic simulation software to design and simulate 5G antennas within a device, where package interactions can change the radiated emissions.
Samsung Foundry licensed Arteris IP’s FlexNoC Interconnect IP for use by its worldwide networking, mobile, Internet engine, consumer, and automotive customers. Samsung, which has licensed the IP since 2017, cited ability to adapt designs to customer demands as well as power and die area savings.
Standards
The Si2 Compact Model Coalition updated the BSIM-Bulk standard, a compact SPICE model. The latest version of BSIM-Bulk offers improved accuracy, convergence and performance over the previous version and various bug fixes. It also features high-voltage transistor modeling, node collapsing for faster runtime, improved flicker noise modeling for low-noise analog and RF applications, and enhanced tuning flexibility in capacitances.
The MIPI Alliance published MIPI Debug for I3C v1.0, a flexible and scalable debug and test specification for systems that enable applications such as 5G, IoT, and automotive. Built on the MIPI I3C v1.1 (and MIPI I3C Basic v1.0) utility and control bus, the new specification allows system designers to efficiently and dynamically debug and test application processors, power management integrated circuits, modems and other power-managed components across a system of any size via the low-bandwidth MIPI I3C interface.
Events
Find a new conference or learning opportunity at our events page, or check out an upcoming webinar.
The AI Hardware Summit virtual event will take place Sept. 29-Oct. 7 with a focus on optimizing systems for AI and machine learning, including co-design, edge applications, and the impact of AI on memory, storage, and networking.
VSDOpen, a virtual event dedicated to open source EDA and designs, will take place Oct. 10 with workshops available Oct. 7-9. Topics will include RISC-V in India, open IP designs, and what can be learned from the open source software movement.
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