Week In Review: Design, Low Power


Arteris IP will acquire the assets of Magillem Design Services, combining Arteris' NoC interconnect IP with Magillem's chip design and assembly environment. Magillem’s software products will continue to be offered separately from the Arteris interconnect IP offerings and the joined company will continue to execute on Magillem’s existing product and technology roadmaps. Substantially all Mag... » read more

ML Opening New Doors For FPGAs


FPGAs have long been used in the early stages of any new digital technology, given their utility for prototyping and rapid evolution. But with machine learning, FPGAs are showing benefits beyond those of more conventional solutions. This opens up a hot new market for FPGAs, which traditionally have been hard to sustain in high-volume production due to pricing, and hard to use for battery-dri... » read more

Week In Review: Design, Low Power


Synopsys acquired Qualtera, a provider of big data analytics for semiconductor test and manufacturing. Based in Montpellier, France and founded in 2010, Qualtera's Silicondash platform provides both off-line and in-line modules for data analytics, visualization, simulation, and modeling to allow for development of control strategies. Combined with Synopsys' TestMAX test automation solution, the... » read more

Week In Review: Auto, Security, Pervasive Computing


Edge, cloud, data center Programmable logic company Efinix used Cadence’s Digital Full Flow to finish Efinix’s Trion FPGA family for edge computing, AI/ML and vision processing applications, according to a press release. Last week Efinix also announced three software defined SoCs based on the RISC-V core. The SoCs are optimized to the Trion FPGAs. AI, machine learning Amazon will tempo... » read more

Week In Review: Design, Low Power


Tools & IP Synopsys introduced its DesignWare USB4 IP solution consisting of controllers, routers, PHYs, and verification IP. It supports USB4, DisplayPort with HDCP 2.3 security, PCI Express, and Thunderbolt 3 connectivity protocols through USB Type-C connectors and cables. The USB4 IP operates at up to 40 Gbps, twice the maximum data rate of USB 3.2, and is backwards compatible with USB 3... » read more

Where Is The eFPGA Market And Ecosystem Headed?


In this article we’ll discuss the availability of eFPGA, the applications for eFPGA and the current and future market size for eFPGA. eFPGA vendors & offerings Embedded FPGA is a new development this decade. There are now multiple vendors offering eFPGA on a wide range of process nodes with multiple customers. eFPGA Vendors Menta has had eFPGA available for the longest: their offe... » read more

Week In Review: Design, Low Power


M&A eSilicon will be acquired by Inphi Corporation and Synopsys. Inphi is acquiring the majority of the company, including the ASIC business and 56/112G SerDes design and related IP, for $216 million in both cash and the assumption of debt. Inphi expects to combine its DSP, TiA, Driver and SiPho products with eSilicon’s 2.5D packaging and custom silicon design capabilities for electro-optics... » read more

Week In Review: Design, Low Power


M&A NXP will acquire Marvell's Wi-Fi Connectivity business in an all-cash, asset transaction valued at $1.76 billion. The deal includes the Wi-Fi and Bluetooth technology portfolios and related assets; the business employs approximately 550 people worldwide. The deal is expected to close by calendar Q1 2020. Tools Cadence unveiled a data center-optimized FPGA-based prototyping system, ... » read more

How To Integrate An Embedded FPGA


Choosing to add programmable logic into an SoC with an eFPGA is just the beginning. Other choices follow involving how many lookup tables (LUTs), how much routing and what topology, how will data be transferred in and out of the fabric, does data need to be coherent with system memory, how will it be programmed and tested, and what RTL functions need to be embedded into the programmable fabric ... » read more

Week In Review: Design, Low Power


The MIPI Alliance released MIPI I3C Basic v1.0, a subset of the MIPI I3C sensor interface specification that bundles 20 of the most commonly needed I3C features for developers and other standards organizations. The royalty-free specification includes backward compatibility with I2C, 12.5 MHz multi-drop bus that is over 12 times faster than I2C supports, in-band interrupts to allow slaves to not... » read more

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