Week In Review: Design, Low Power

Visual debug; LPDDR5 update; new Cadence CEO; financial reports.


Vtool released a new version of its Cogita visual debug platform. New features aim to provide faster debug capabilities, including visual representation of test results using log files as input, improved manipulation and navigation throughout big logs, ML algorithms to classify data and find the relationship between inputs, and the ability to merge and compare test flow of two different tests/runs and in the same view to quickly spot the differences of passing and failing log files.

Cadence reported financial results for the second quarter 2021 with revenue of $728 million, up 14.1% from the second quarter of 2020. On a GAAP basis, Q2 2021 income was $0.56 per share, up 19.2% from $0.47 per share in the same quarter last year. Non-GAAP earnings were $0.86 per share, up 30.3% from $0.66. The company is raising its outlook for the year.

Anirudh Devgan will take over as CEO of Cadence in December. Current CEO Lip-Bu Tan will transition to the role of executive chairman. Tan has been CEO since 2009. Devgan has served as president of Cadence since 2017 and oversees all the research and development, sales and field engineering as well as corporate strategy, marketing and business development groups, including mergers and acquisitions. He will remain president.

Xilinx reported first quarter 2022 financial results with revenue of $879 million, up 21% from the same quarter last year. On a GAAP basis, Q1 2022 earnings per share were $0.83, up 118% from $0.38 in Q1 2021. Non-GAAP earnings were $0.95 per share, up 46% from $0.65 in the same quarter last year. “Record Q1 revenues were driven by strength in the Data Center end market, as well as a record quarters for our Industrial, Broadcast and Consumer end markets. This drove 3% sequential and 21% year-over-year growth,” said Brice Hill, Xilinx CFO. “Advanced Products grew 2% sequentially and 27% annually, and represented 72% of total revenue. Top line performance drove record free cash flows of $373 million, or 42% of revenue.”

JEDEC published an update to the LPDDR5 standard that is focused on improving performance, power and flexibility, and a new LPDDR5X standard, which is an optional extension to LPDDR5. The two standards are designed to boost memory speed and efficiency for a variety of uses including mobile devices and AI applications. Updates include a speed extension up to 8533 Mbps (versus up to 6400 Mbps), signal integrity improvements with TX/RX equalization, and reliability improvements with a new Adaptive Refresh Management feature. The LPDDR5X optional extension offers higher bandwidth and simplified architecture in support of enhanced 5G communication performance.

Micron started volume shipping of its 176-layer NAND Universal Flash Storage (UFS) 3.1 mobile solution. Targeted at high-end and flagship phones, it has up to 75% faster sequential write and random read performance and 15% faster mixed workload performance than prior generations.

Infineon debuted a high-voltage microcontroller with USB Power Delivery 3.1 support. The USB PD MCUs targets embedded systems that provide or consume power with high-voltage up to 28 V. It includes an Arm Cortex-M0/M0+ processor with up to 256 KB Flash memory and 32 KB SRAM, USB full-speed device, programmable general purpose input/output pins, gate drivers, low drop out regulators, and high-voltage protection circuits.

Market research firm IC Insights is forecasting a 21% jump in IC unit shipments this year, reaching 391.2 billion units. IC unit shipments dropped 6% in 2019, then rose 8% in 2020.

Cloud processor company Ampere Computing will acquire OnSpecta, a provider of AI optimization software. “The addition of deep learning expertise will enable Ampere to deliver a more robust platform for inference task processing with lower power, higher performance and better predictability than ever,” said Renee James, founder, chairman and CEO of Ampere Computing.

The companies have already been collaborating and have demonstrated over 4x acceleration on Ampere-based instances running popular AI-inference workloads. “This is a natural progression to the strong collaboration we already have with Ampere,” said Indra Mohan, co-founder and CEO of OnSpecta. “Our team will greatly benefit from being a part of Ampere as we help build upon the great success of Ampere Altra and provide critical support to customers as they apply the Altra product family to a wide variety of AI inference use cases.” The acquisition will include an optimized model zoo with object detection, video processing and recommendation engines. Founded in 2017, OnSpecta is based in Redwood City, Calif. Terms were not disclosed; the deal is expected to close in August.

Technische Universität Dresden, the University of Manchester, Racyics, and GlobalFoundries collaborated to tape out the SpiNNaker2 chip, a neuromorphic AI processor. Designed to scale up to a 70,000 chip cloud system while maintaining strict real time operation, SpiNNaker2 has an event-based compute architecture with power management and custom AI hardware acceleration. “There is still a great deal to learn from biology if we are to realize the full potential of AI in the future. SpiNNaker2 has been designed to bridge the gulf between realistic brain models and AI so that each may increasingly be informed by the other,” said Prof. Steve Furber of the University of Manchester. The full 10 Mio core SpiNNaker2 machine, called ‘SpiNNcloud,’ will be deployed at Technische Universität Dresden for research purposes. It will also be made commercially available through the new startup SpiNNcloud Systems.

The U.S. National Science Foundation established 11 new NSF National Artificial Intelligence Research Institutes, joining seven announced last year with a total funding of $220 million. Each will focus on AI-based technologies in a range of specific research areas: human-AI interaction, AI for optimization, cyberinfrastructure, computer and network systems, dynamic systems, augmented learning, and agriculture.

Safety & security
Synopsys added Rapid Scan capabilities to its Coverity static application security testing and Black Duck software composition analysis solutions. Rapid Scan is aimed at providing fast, lightweight vulnerability detection for both proprietary and open source code during the early stages of development.

Cadence’s Tensilica Xtensa processors with FlexLock have been certified by SGS-TÜV Saar to meet the ISO 26262:2018 standard to ASIL-D. The functional safety certification spans from base microcontroller to high-performance DSP, each with a configuration option for FlexLock to provide increased random fault protection and developed to protect against systematic faults.

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