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Chip Industry’s Technical Paper Roundup: Nov. 15


New technical papers added to Semiconductor Engineering’s library this week. [table id=63 /] » read more

Multi-Bit In-Memory Computing System for HDC using FeFETs, Achieving SW-Equivalent-Accuracies


A new technical paper titled "Achieving software-equivalent accuracy for hyperdimensional computing with ferroelectric-based in-memory computing" by researchers at University of Notre Dame, Fraunhofer Institute for Photonic Microsystems, University of California Irvine, and Technische Universität Dresden. "We present a multi-bit IMC system for HDC using ferroelectric field-effect transistor... » read more

Technical Paper Round-Up: June 28


New technical papers added to Semiconductor Engineering’s library this week. [table id=35 /] Semiconductor Engineering is in the process of building this library of research papers. Please send suggestions (via comments section below) for what else you’d like us to incorporate. If you have research papers you are trying to promote, we will review them to see if they are a good fit f... » read more

OBJTs (Organic Bipolar Transistors) Based on Crystalline Rubrene Thin Films


New technical paper titled "Organic bipolar transistors" from researchers at Technische Universität Dresden, NanoP, Technische Hochschule Mittelhessen, University of Applied Science, and ALBA Synchrotron. Abstract (Partial) "Here we present organic bipolar transistors with outstanding device performance: a previously undescribed vertical architecture and highly crystalline organic rubrene ... » read more

Technical Paper Round-up: May 31


New technical papers added to Semiconductor Engineering’s library this week. [table id=30 /] Semiconductor Engineering is in the process of building this library of research papers. Please send suggestions (via comments section below) for what else you’d like us to incorporate. If you have research papers you are trying to promote, we will review them to see if they are a good fit for... » read more

Using Dynamic Route Map Technique for Insight Into Memristors


New technical paper titled "Empirical Characterization of ReRAM Devices Using Memory Maps and a Dynamic Route Map," from Balearic Islands University, UC Berkeley, Health Institute of the Balearic Islands, International Hellenic University, Technische Universität Dresden, Universidad de Valladolid, and Aristotle University of Thessaloniki. Abstract: "Memristors were proposed in the early 1... » read more

High Electron Mobility in Strained GaAs Nanowires


Abstract: "Transistor concepts based on semiconductor nanowires promise high performance, lower energy consumption and better integrability in various platforms in nanoscale dimensions. Concerning the intrinsic transport properties of electrons in nanowires, relatively high mobility values that approach those in bulk crystals have been obtained only in core/shell heterostructures, where elec... » read more

Week In Review: Design, Low Power


Tools Vtool released a new version of its Cogita visual debug platform. New features aim to provide faster debug capabilities, including visual representation of test results using log files as input, improved manipulation and navigation throughout big logs, ML algorithms to classify data and find the relationship between inputs, and the ability to merge and compare test flow of two different ... » read more

Implementation Of An Asynchronous Bundled-Data Router For A GALS NoC In The Context Of A VSoC


Designs of asynchronous networks-on-chip are of growing interest because a complete asynchronous implemen- tation can solve the synchronization problems of large networks. However, asynchronous circuits suffer from the lack of proper design flows because their functionality often relies on timing constraints, which are not extensively supported by common CAD synthesis tools. This paper proposes... » read more

The Week In Review: Manufacturing


Fab materials/tools The Reference Project, a pan-European research program created to develop radio-frequency silicon-on-insulator (RF-SOI) technology, was recently launched at the Bernin, France-based facilities of Soitec. Soitec is the project leader in the group, which has an eligible budget of 33 million euros. The project will focus on developing technologies for 4G+ communications usi... » read more