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Week In Review: Design, Low Power

LPDDR5 IP; USB4 announced; Dialog buys ultra-low-power Wi-Fi line.

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Cadence debuted Denali Gen2 IP for LPDDR5/4/4X in TSMC’s 7nm FinFET process technology. The offering consists of PHY, controller and Verification IP. It supports both the pre-release LPDDR5 standard and LPDDR4/4X devices as well as Arm AMBA AXI buses and reliability features like in-line error correcting codes. The LPDDR5 standard provides up to 1.5x bandwidth over LPDDR4 and LPDDR4X.

The USB4 specification has been announced. The upcoming version will be based on Intel’s Thunderbolt protocol specification, which retains the Type-C connector. Alongside doubling bandwidth to up to 40Gbps, the new USB4 architecture defines a method to share a single high-speed link with multiple end device types dynamically that best serves the transfer of data by type and application. The USB Promoter Group expects the specification to be published around the middle of 2019.

Dialog Semiconductor will acquire Silicon Motion Technology Corporation’s Mobile Communications product line, branded as FCI, for $45 million in cash. The acquisition adds Ultra-Low-Power Wi-Fi SoCs and Modules, Mobile TV SoCs and Mobile Communication transceiver ICs to Dialog’s lineup. In particular, the company sees Ultra-Low-Power Wi-Fi as a complement to its Bluetooth Low Energy chips for IoT devices.

Lynxi Technologies licensed Arteris IP’s FlexNoC Interconnect for use in its high-performance neural network processing chips. Lynxi is a Beijing-based startup.

ClioSoft reported a 15% increase in year-over-year bookings for the 2018 financial year with 54 new customer accounts. The design data and IP management company said this is its nineteenth profitable year.

Events
Verification 3.0 Innovation Summit: Mar. 19, 1 p.m.-8 p.m., in Santa Clara, CA. A half-day seminar focused on advanced technical content around a range of topics on verification innovation, including a keynote by former Cadence CEO Joe Costello, three sessions, and a mini exhibit and reception. The event is free but registration is required.

DATE 2019: Mar. 25-29 in Florence, Italy. The conference and exhibition will feature keynotes on heterogeneous computing in cloud and HPC as well as the limitations of modeling frameworks for intelligent systems. Sessions will highlight emerging design technologies, design and test of secure systems, embedded systems for deep learning, and more. Advanced registration closes Mar. 13.

Linley Spring Processor Conference 2019: April 10-11 in Santa Clara, CA. Beginning with an overview of the processor and IP market, technologies, equipment-design, and silicon trends, the event will include talks and panel discussions on a range of topics. AI chips and IoT security are both major focuses.



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