Tech Talk: Embedded Memories

Dave Eggleston, vice president of embedded memory at GlobalFoundries, talks about the pros and cons of new types of embedded memory, including which work best for certain applications and with various advanced packaging options. [youtube vid=7D9zoA9FFIw] » read more

Manufacturing Bits: Oct. 25

GaN-on-GaN power semis Power semiconductors based on gallium nitride (GaN) are heating up in the market. Typically, suppliers are shipping devices using a GaN-on-silicon process. These devices are available with blocking voltages of up to 650 volts. Going beyond 650 volts is problematic, however. GaN-on-silicon processes suffer from lattice mismatches, cost and other issues. At the ... » read more

Watch Out For 200mm Fabs: Fab Outlook To 2020

One year after the debut of the industry’s first 200mm Fab Outlook report, SEMI has just issued an October 2016 update with the improved and expanded report forecasting 200mm fab trends out to 2020. This extensive report features trends from 2009 to 2020, showing how 200mm fab activities and capacity change worldwide.  Industry spending for construction and equipment is detailed and analy... » read more

GaN Power Semi Biz Heats Up

The market for devices based on gallium nitride (GaN) technology is heating up amid the push for faster and more power efficient systems. Today, [getkc id="217" kc_name="GaN"] is widely used in the production of LEDs. In addition, it is gaining steam in the radio-frequency (RF) market. And the GaN-based power semiconductor market finally appears ready to take off, after several false starts ... » read more

IP Market: CPU Still The Largest But Security Leads In Growth

The 3rd Party Semiconductor Intellectual Property (SIP) market has seen great innovation in the products it offers to System-on-a-Chip (SoC) designers over the last ten years. If any market segment in the semiconductor industry typifies the intense evolutionary pressures that the entire electronics market has undergone, it is the 3rd Party SIP market. Most of these evolutionary forces are dr... » read more

The Week In Review: Manufacturing

Chipmakers At upcoming the 2016 IEEE International Electron Devices Meeting (IEDM) in San Francisco, TSMC will square off against the alliance of IBM, GlobalFoundries and Samsung at 7nm. IEDM will take place Dec. 3-7, 2016. TSMC will present a paper on 7nm finFET technology. Using 193nm immersion and multi-patterning, the 7nm technology features more than three times the gate density and ei... » read more

How Many Nanometers?

What’s the difference between a 10nm and a 7nm chip? That should be a straightforward question. Math, after all, is the only pure science. But as it turns out, the answer is hardly science—even if it is all about numbers. Put in perspective, at 65nm, companies defined the process node by the half pitch of the first metal layer. At 40/45nm, with the cost and difficulty of developing n... » read more

To 10nm And Beyond

Hong Hao, senior vice president of the foundry business at Samsung Semiconductor, sat down with Semiconductor Engineering to discuss the future direction of transistors, process technology, lithography and other topics. What follows are excerpts of those conversations. SE: Samsung recently rolled out its 10nm finFET technology. It appears that Samsung is the world’s first company to ship 1... » read more

Achieving The Vision Of Silicon Photonics Processing

With the increasing need for faster data transfer rates, the transition from electrical to optical signaling in data processing is inevitable. Copper cabling cannot keep up with the upcoming data center bandwidth requirements for applications such as multimedia streaming and high performance computing. One technology that could enable true optical communication is silicon photonics. Silicon is ... » read more

Creating An Accurate FEOL CMP Model

By Ruben Ghulghazaryan, Jeff Wilson, and Ahmed AbouZeid For decades, semiconductor manufacturers have used chemical-mechanical polishing (CMP) as the primary technique for the smoothing and leveling (planarization) of dielectrics and metal layers. CMP modeling allows  design and manufacturing teams to find and fix potential planarization issues before the actual CMP process is applied to a ... » read more

← Older posts