Fast, Accurate, And Standards-Based

Unlike the loosely timed models used for software development, which rely on a high level of abstraction to simulate as fast as possible, the communication between the architecture models in a virtual prototype for early performance analysis requires timing to be modeled more accurately.

This tradeoff can seem like a big leap to some, spanning the gap from SystemC TLM-2.0 LT (loosely timed) models at one end and cycle accurate RTL at the other. However, there is a solution in between, designed exactly for this purpose…TLM-2.0 AT, or approximately timed modeling.

The TLM-2.0 AT standard provides a base protocol for modeling timed communication, but it’s generic and it doesn’t implement all the features available in the actual protocols used in production SoCs. This naturally limits the accuracy the base standard can express when used for early performance analysis. Thankfully for architects everywhere, the authors of the TLM-2.0 standard also defined extension mechanisms. Those mechanisms enable AT to properly represent popular industry protocols, such as AXI, with accurate timing, while retaining full model interoperability with standards-based AT models. The result is an impressive combination of speed and accuracy.

To illustrate this, we can compare the results of a simple system simulation. The same communication is modeled in two different ways, first using the TLM-2.0 AT base protocol, and second using Synopsys Fast Timed TLM-2.0 extensions for AXI (or FT AXI for short):

• Each system fires a number of 20 read and 20 writes both single and burst.
• Each system has 3 masters and each master is running 10,000 iterations.
• Total transaction count in each case = (2 * 20 * 10000) * 3 = 1.2 million transactions.

Both systems simulate fast enough for architecture exploration and analysis. Zooming in on the read transactions, the tables below highlight a considerable difference in the accuracy:

Because it’s able to express the details of the AXI protocol, the FT AXI system reflects the more accurate behavior. The average throughput and the average duration of the read transactions (along with other available metrics) provide the architect with a more realistic estimate of the performance that can be achieved with the current system.

On the other hand, the results from the other system are overly optimistic and increase the risk that the system will be under-designed. What are the reasons? Without using FT AXI extensions to improve the accuracy of communication, the system using only the TLM-2.0 AT base protocol has limitations:

• No beat timing for burst accesses.
• Address and data are always sent together for writes.
• Concurrent read and write requests are not possible.
• Additional attributes like burst type and burst size (narrow transactions) are absent.

Synopsys Platform Architect incorporates the Fast Timed AXI Extensions into the TLM APIs available to the architecture virtual prototype. This way the model creator does not need to deal with the details of the respective protocol to enable FT or to enable model interoperability between FT and AT models.

So when using TLM-2.0 AT architecture modeling for early performance analysis, extend yourself. Take advantage of Fast Timed Extensions to achieve the best combination speed and accuracy. It’s fast, accurate, and standards-based.