Silence Is Golden

As the industry continues to march along building devices with ever-increasing battery life, it is necessary to migrate to the latest and greatest process nodes, which as we all know are smaller and use lower voltages. However, any noise in the system—whether it was there before or you start to use something like USB 3.0 or SATA or something else—is actually going to increase the number of problems, observed Eric Huang, product marketing manager for USB digital cores at Synopsys.

I found it interesting that Eric claimed not to be an expert in high-speed I/Os during a recent talk but he sure fooled me. He also pointed out that as you increase the frequencies of next-gen devices, the amount of switching that’s going on is much faster, and gave some helpful hints for how to manage it.

“If you have much faster switching, you need to do things. For example, at the cable level you need to shield your differential cables to reduce the amount of noise coming into each pair of signals. You need to make sure that you have separate pads and sufficient numbers of pads so that the incoming and outgoing signaling that’s going through is properly supplied and properly decoupled from the power and the grounds. When you have higher frequencies, it means you have to have a larger number of power and grounds to handle those higher frequencies,” he explained.

Eric also pointed out that this is not so much of a problem on the digital side of the world. It’s well understood inside the controller, but you have to worry about the exo switching of the serial I/Os. “The idea is that, now you’ve got all this switching going on in the physical layer in the PHY layer, the mixed-signal component, so you’re going to put it up next to this big digital piece, which might have the microprocessor, the USB digital controller, a whole bunch of the digital logic. You need to make sure that you isolate those two sufficiently that the lots and lots of switching that’s on the wire doesn’t affect the digital logic.”

In essence, to avoid crosstalk and noise in high-speed I/Os:

1. Design the circuit or elements with a high power supply rejection ratio (PSRR), which has to do with the quality of the voltage—a higher value of the voltage relative to the I/O noise.
2. Make sure you do decoupling.
3. Have separate supply domains.
4. Use deep n-well process options, but that requires additional mask layers and it will cost you more area. It adds both depth and it adds area, so there is a trade-off there. (Deep trench isolation by IBM) This allows you to dope at a much deeper level to isolate your circuit from noise. If you put it deeper inside the substrate, it’s going to be more isolated.

~Ann Steffora Mutschler