How to bring 64-bit computing to entry-level mobile devices.
Sometimes the most intriguing market growth comes in “unsexy” applications.
Take the mobile market for example. Overall growth rates are cooling, as you’d expect with a maturing market. But in 2020, 1 billion smart phones are expected to ship in the entry-level category. This implies an 8% compounded annual growth rate, making entry mobile the most rapidly expanding mobile market segment.
That’s a big number, for sure, but the key is that because of relentless electronics ecosystem innovation, new features and functionality are now available to a massive new consumer audience.
The mass market, mobile-first push is changing the world, transforming societies and social strata – and not just the poor. Think about education. Think about banking and savings and investments opportunities.
The early versions of these new empowering technologies came in 32-bit forms, with useful but limited features sets as a way to begin to bring new experiences to lower portions of the mobile market.
What happens when you bring 64-bit compute into the conversation?
ARM this week introduced the Cortex-A35, the start of new family of ultra high efficiency application processors that builds up previous generations in some interesting ways.
The launch of the Cortex-A5 processor in 2009 ushered in a new era of high efficiency mobile computing, utilizing the then-modern ARMv7-A architecture profile in extremely low power and area profiles. The efficiencies offered by Cortex-A5 enabled the rapid proliferation of entry smartphones. The Cortex-A7 offered further performance and efficiency improvements, along with support for ARMv7-A extensions. Additionally, the Cortex-A15 and Cortex-A7 processors formed the first big.LITTLE CPU pair.
Both the Cortex-A5 and Cortex-A7 processors have seen widespread adoption, not just in mobile but in other diverse markets such as embedded, wearable computing and offload processing in enterprise applications. Cortex-A5 and Cortex-A7 have shipped in more than 2 billion entry smartphones to date.
This rapid growth in entry smartphones sets the stage for the Cortex-A35. The requirements for next-generation entry mobile solutions converge on three key requirements –more performance, less power, and premium features at an affordable cost point. The new processor brings the modern 64b compute capabilities for the next 1 billion smartphone users while delivering efficiency improvements compared to the previous generation of processors targeting entry markets.
So how does that compare to previous generation cores? Here are three points for comparison:
1. Improvements in efficiency — higher performance and lower power;
2. New power management capabilities to lower power consumption and increase battery life, and
3. ARMv8-A architecture support – 64b capable with backwards compatibility.
The Cortex-A35 consumes 10% lower active power when compared to Cortex-A7 for an iso-frequency implementation on 28nm. However, this comparison is for processors across different architecture generations – the Cortex-A7 is an ARMv7-A 32-bit processor whereas the Cortex-A35 is an ARMv8-A processor and supports both 64b and 32-bit compute capabilities.
Comparing Cortex-A35 with Cortex-A53 (the first efficiency-maximizing ARMv8-A processor), the Cortex-A35 core is 25% smaller for a typical configuration that includes 32k L1 caches, NEON, and crypto blocks. The Cortex-A35 consumes 32% lower power per core and is 25% more efficient compared to Cortex-A53. This makes Cortex-A35 the smallest, lowest power and most efficient ARMv8-A processor we have built. There’s also a redesigned in-order eight-stage pipeline that delivers significant efficiency improvements while providing full ARMv8-A support (capability to execute both A32/T32 and A64 instruction sets). There are microarchitectural improvements, as well, in the L1 and L2 memory systems, improved floating point and DSP performance and logic for power management.
The graph below depicts the relative performance improvements delivered by Cortex-A35 pipeline compared to Cortex-A7 across some of the popular benchmarks. To ensure like-for-like performance comparison, the graph below compares only 32-bit code on Cortex-A35 and Cortex-A7, using the same processor configurations, and running at same clock frequency.
Power management, compatibility
Saving each mW of power is extremely important for entry smartphones, where the overarching goal is to maximize the battery life. The Cortex-A35 adds new power management capabilities, while making it easier for designers to integrate these features in their next-generation entry mobile SoC platforms. It also executes the A64 instruction set in the AArch64 execution state. This means that future entry mobile platforms can achieve higher performance via larger register banks, clean instruction set, double precision floating-point vector operations and native crypto instructions.
In the AArch32 execution state, the Cortex-A35 runs the A32/T32 instruction sets and executes the existing software written for ARMv7-A architecture. In addition, new crypto and floating-point instructions have been added to the AArch32 state, thereby providing efficient acceleration of algorithms that use these instructions.
The Cortex-A5 and Cortex-A7 have been shipping in several entry smartphone platforms using different core configurations ranging from single core to octa core. The scalability and configurability of Cortex-A35 opens up new possibilities for ARM partners to continue innovating and differentiating for future mobile solutions while delivering the full ARMv8-A features. Cortex-A35 can be configured from an ultra low power, very small single core to four cores in a single CPU cluster. It also can be connected as a LITTLE CPU in a big.LITTLE system. The diagram below shows a one among several possible examples of a next generation 64b capable entry mobile compute subsystem. The example uses a quad core Cortex-A35 cluster with other energy efficient IP from ARM and is capable of delivering efficiency improvements while incorporating the premium features in affordable cost points for the next billion smartphone users.
(Kinjal Dave is product manager with ARM’s CPU Group, based in Cambridge, UK).