Integration IP Helps IP Integration

You might not know much about the MIPI Alliance if you aren't designing mobile phones, but you will soon. Other application areas are taking interest in what this group has accomplished. The alliance was founded in 2003 to create standards for hardware and software interfaces in mobile devices. Successful examples include a camera serial interface (CSI) and a display serial interface (DSI), ... » read more

The Week In Review: Design

Tools Aldec uncorked its TySOM embedded development kit, which includes Riviera-PRO mixed-HDL language simulation for VHDL 2008/Verilog 2005, a Xilinx Zynq-based development board and pre-validated Ubuntu Embedded Host reference designs and tutorials. Mentor Graphics introduced the first phase of its new Xpedition PCB design flow with technologies for design and verification of rigid and ... » read more

Speeding Up The Design Process

A rush to plant a stake in new markets, coupled with uncertainty about how to generate a reasonable return on investment in those markets, is ratcheting up pressure on chipmakers. They now must come up with more customized solutions in less time, frequently in smaller volumes, and with the ability to modify them in shorter time spans if market opportunities shift in unexpected ways. This aff... » read more

What’s Next For UVM?

The infrastructure for much of the chip verification being done today is looking dated and limited in scope. Design has migrated to new methodologies, standards and tools that are being introduced to deal with heterogeneous integration, more customization, and increased complexity. Verification methodologies started appearing soon after the release of SystemVerilog. Initially they were inten... » read more

The Secret to Reaching Rapid Verification Closure

Every design team is looking to reduce RTL verification time in order to meet aggressive schedules. Successful teams have moved their level of design abstraction up to the C++ or [gettech id="31018" comment="SystemC"] level and employ [getkc id="105" comment="high-level synthesis"] (HLS) within their design flow. By taking advantage of this high-level description, these teams also plug into int... » read more

System-Level Verification Tackles New Role

Semiconductor Engineering sat down to discuss advances in system-level verification with Larry Melling, product management director for the system verification group of [getentity id="22032" e_name="Cadence"]; Larry Lapides, vice president of sales for [getentity id="22036" e_name="Imperas”] and Jean-Marie Brunet, director of marketing for the emulation division of [getentity id="22017" e_nam... » read more

Going Open Source

Open Source often is thought of as an alternative to commercial software licensed using fairly typical business models. For example, variants of open source Linux supplied by companies such as Red Hat charge a subscription for support and maintenance. Maybe there is an opportunity to leverage Open Source alongside commercial EDA software to provide use model advantages and open development f... » read more

Bridging the IP Divide

IP reuse enabled greater efficiency in the creation of large, complex SoCs, but even after 20 years there are few tools to bridge the divide between the IP provider and the IP user. The problem is that there is an implicit fuzzy contract describing how the IP should be used, what capabilities it provides, and the extent of the verification that has been performed. IP vendors have been trying to... » read more

The Week In Review: Design/IoT

Standards The IEEE launched the International Roadmap for Devices and Systems (IRDS), effectively setting the industry agenda for future silicon benchmarking and adding metrics that are relevant to specific markets rather than creating the fastest general-purpose processing elements at the smallest process node. For more on the IRDS, check out Ed Sperling's analysis. Accellera's SystemC A... » read more

Verification Facing Unique Inflection Point

The Design and Verification Conference and Exhibition (DVCon) attracted more than 1,100 people to San Jose last week, just slightly less than last year. While a lot of focus, and most of the glory, goes to design within semiconductor companies, it is verification where most of the advancements are happening and thus the bigger focus for DVCon. The rate of change in verification and the producti... » read more

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