Designing For Security

Stacked die may improve performance and lower power, but the use of [getkc id="203" kc_name="through-silicon vias"] (TSVs) could add new security risks. As IC structures go, the vertical component of these chip packages is both a boon and a bust. Three-dimensional geometries allow for much less complexity in design by stacking two-dimensional dies and interconnecting them in the third dimens... » read more

Momentum Builds For Monolithic 3D ICs

The 2.5D/3D chip market is heating up on several fronts. On one front, stacked-die using through-silicon vias (TSVs) is taking root. In a separate area, Samsung is sampling the world’s first 3D NAND device, with Micron and SK Hynix expected to follow suit. And now, there is another technology generating steam—monolithic 3D integrated circuits. In stacked-die, bare die are connected using... » read more