The Brave New World Of Modeling TSVs

By Ann Steffora Mutschler With 2D ICs the prevailing notion has been that wire parasitics are relatively self-contained with the exception of very advanced designs running at hundreds of gigahertz. For the most part, the package designer and IC designer lived in their own separate worlds. With the advent of chip stacking using through silicon vias (TSVs), those worlds are being thrust together... » read more

More EMI Mitigation

With electromagnetic interference a major design challenge today in any product that sends or receives a signal, determining how to lessen the impact of this phenomenon was addressed to a large extent in my article, “EMI Cuts a Wide Swath,” but there are a few additional techniques that are important to highlight. Erick Olsen, marketing director at NXP explained that higher performance c... » read more