Divide And Conquer: A Power Verification Methodology Approach


It’s no secret that the power verification challenge has grown by leaps and bounds in the recent past, especially considering design complexity and the sharp rise in the number of power domains in an SoC. As a result, SoC teams want to apply a rigorous [getkc id="10" kc_name="Verification"] flow, observed Gabriel Chidolue, verification technologist at [getentity id="22017" e_name="Mentor G... » read more

Verification Quality Comes Into Focus


Across the board, when I talk with people about power management verification or any verification actually, the topic of quality always comes up. The first plan of attack is to look at coverage: how it is managed, how to perform coverage in a more constructed way. Ellie Burns at Mentor Graphics mentioned that because UPF can define all of the states of the system, the states of the power man... » read more

Power Verification Now Required


Today’s verification tasks may seem daunting — and much of it is — but all of it is absolutely necessary to make sure chips operate properly with a larger system. Throw power into the mix and the challenges mount. The good news is that there is no shortage of tools and methodologies to help with these tasks. The bad news is that even the best tools won’t make the challenges disappear... » read more