Extending UPF For Use In System-Level Design

Energy efficiency as a design constraint continues to dominate, and now that we see greater momentum behind a shift left toward system-level design, we are naturally seeing power-aware system-level design as a key area for EDA and IP enablement, especially among mobile and IoT platform providers. In my last article I highlighted the role that IP power models play in the architecture and design ... » read more

Blog Review: July 2

Mentor’s Nazita Saye has reservations about driverless cars. Sometimes it’s actually fun to drive—and sometimes it isn’t. Cadence’s Brian Fuller is a bit more optimistic about driverless cars. He says that from the standpoint of safety, efficiency and environment, autonomous vehicles will be a big step forward—if and when some critical problems are solved. And along the same... » read more

Which Group Should Create System Models?

One of the factors affecting adoption of a system-level flow is identifying who will do the work to create the system model. For most organizations it's not something they have allocated to a specific group. Generally when an ESL flow is deployed, the software developers, architects and hardware designers will all benefit from the investment, so it would be reasonable that they all contribut... » read more

Are Hardware Developers From Mars And Software Developers From Jupiter?

By Frank Schirrmeister In a recent discussion fellow Blogger Kurt Shuler, when talking about hardware and software designers, said something along the lines “Given languages like Verilog, both hardware and software developers really do software, for hardware designers the software is just getting fixed much sooner.” I intuitively agreed with him, but his comment inspired this post in which... » read more