The Week In Review: Design

NVM Express; DDR3/4 controller core; Verification Academy additions.

popularity

IP

Avery Design Systems released NVM Express over Fabrics 1.0 and NVM Express 1.2.1 extensions to its NVM-Xactor verification IP, enabling verification of both NVMe over PCIe and NVMe over Fabrics designs.

Arastu Systems uncorked an optimized DDR3/4 DRAM Controller Core, which works with DFI 3.1 compatible PHY. The core supports all key DDR3/DDR4 features and additional features like Error Correction Code (ECC) generation/checking and multiple power modes to reduce power consumption.

Education

Mentor Graphics added a new SystemVerilog course, SystemVerilog Object-Oriented Programming for UVM Verification, and a Patterns Library to its Verification Academy. The patterns library focuses on solutions for commonly encountered recurring problems, including simulation testbenches, specifying assertions, defining input stimulus, and analysis.

Deals

Mentor Graphics won a deal with Kaynes Technology, an electronic manufacturing service company, for a complete design-to-manufacturing solution, citing a 30% reduction in the time required to get customer data to production over its legacy home-grown systems.