2.5D, ASICs Extend to 7nm

The leading-edge foundry market is heating up. For example, GlobalFoundries, Intel, Samsung and TSMC have recently announced their new and respective processes. The new processes from vendors range anywhere from 10nm to 4nm, although the current battle is taking place at 10nm and/or 7nm.

In fact, one vendor, GlobalFoundries, this week will describe more details about its previously-announced 7nm finFET technology. In addition, the company also announced a new 7nm ASIC offering and revealed its 5nm plans.

GlobalFoundries’ 7nm finFET process, dubbed 7nm Leading-Performance (7LP), is a scaled version of 14nm finFET technology. 7LP promises to deliver 40% more processing power and twice the area scaling than its 14nm finFET technology.

The initial production ramp of 7LP will be based on 193nm immersion and multi-patterning. The company will migrate to EUV lithography when the technology is ready for volume manufacturing.

GlobalFoundries’ 7LP technology is now ready for customer designs at the company’s 300mm fab in Saratoga County, N.Y. Design kits are available now, and the first products based on 7LP are expected to launch in the first half of 2018. Volume production will begin ramping in the second half of 2018.

In addition, GlobalFoundries has also rolled out FX-7, an application-specific integrated circuit (ASIC) offering built on the company’s 7nm finFET technology. FX-7 provides a suite of interface IPs, such as SerDes (60G, 112G), memory, DACs/ADCs and ARM processors. It also includes advanced packaging options such as 2.5D/3D. Design kits for the FX-7 ASIC offering are now available to customers, with volume production expected in 2019.

“The explosion of data traffic and bandwidth in global networks is driving a new set of demands for our customers,” said Mike Cadigan, senior vice president of the ASIC Business Unit at GlobalFoundries. “By leveraging our most advanced 7LP finFET process technology, the FX-7 offering continues to extend our leadership in serving our customers by delivering the most advanced, lower power and high performance ASIC solutions for new market paradigms such as data centers, deep computing, and wireless networking.”

Others also have big plans for 7nm. TSMC’s 7nm technology, dubbed N7, will enter risk production in the second quarter of this year, with volume production in 2018. Then, TSMC will roll out N7+, a process using EUV lithography. Shipments are due in 2019.

For its part, Samsung is developing 8nm, 7nm and 6nm processes. “From a time-to-market point of view, it is inevitable that Samsung must offer a relaxed 7nm technology, in response to TSMC’s aggressive 7nm DUV schedule before EUV becomes ready,” said Sam Wang, a research vice president at Gartner.

“Customers could not fully rely on Samsung’s 7nm EUV-only schedule, which has uncertainty because of the exact progress of ASML (on EUV). In a way, Samsung’s 8LPP node is a relaxed 7nm node, which should be equivalent to TSMC’s N7, and Samsung’s 7LPP should be equivalent to TSMC’s N7+,” Wang said.

Not to be outdone, Intel plans to ship 10nm finFETs by year’s end. Intel argues that its 10nm process is equivalent to 7nm from the other foundries.

While companies are developing 10nm, 7nm and other variants, they are also working on 5nm. Recently, for example, IBM and its Research Alliance partners, GlobalFoundries and Samsung, revealed more details about the development of so-called nanosheet FETs for the 5nm node.

A nanosheet FET is one version of a gate-all-around FET, sometimes called the lateral nanowire FET. An evolution of a finFET, the nanowire FET is a fin on its side with a gate wrapped around it.

Cross-section simulation of (a) finFET, (b) nanowire, and (c) nanosheet. (Source: IBM.)

Still in R&D, a nanosheet FET resembles a lateral nanowire FET. But in nanosheet FETs, the wires are much wider and thicker, enabling it to provide better electrostatics and drive current than nanowire FETs, according to some experts.

Samsung is developing nanosheet FETs for 4nm. GlobalFoundries appears to be developing nanosheet FETs for 5nm. Meanwhile, Intel and TSMC have not disclosed their exact 5nm plans.

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